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參數(shù)資料
| 型號(hào)： | TLC320AD57CDWR |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | ADC |
| 英文描述： | 1-CH 18-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PDSO28 |
| 封裝： | PLASTIC, SO-28 |
| 文件頁數(shù)： | 5/21頁 |
| 文件大?。?/td> | 129K |
| 代理商： | TLC320AD57CDWR |
2–5
available as a master are 16-bit modes. Two of the modes differ as MSB first versus LSB first. These two
modes set SCLK = LRClk
× 32. This is one half the frequency used in the other transfer modes [see Figures
2–3(d) and 2–3(e)]. The third 16-bit mode provides the data MSB first with one clock delay after LRClk [see
Figure 2–3(a)].
15
14
. . .
1
0
15
14
. . .
10
(a) MASTER MODE (Fsync bound)
17
16
. . .
1
0
17
16
. . .
10
17
64 SCLKs
(b) 18-BIT MASTER MODE
64 SCLKs
01
. . .
16
17
0
1
. . .
16
17
(c) 18-BIT MASTER MODE
14
. . .
10
15
14
. . .
10
15
32 SCLKs
Right
Left
(d) DSP CONTINUOUS MODE
32 SCLKs
1
. . .
14
15
01
. . .
14
15
0
(e) DSP CONTINUOUS MODE
Mode 011
SCLK
Fsync
DOUT
LRClk
Mode 100
SCLK
Fsync
DOUT
LRClk
Mode 101
SCLK
Fsync
DOUT
LRClk
Mode 110
SCLK
Fsync
DOUT
LRClk
Mode 111
SCLK
Fsync
DOUT
LRClk
15
0
Left
Right
64 SCLKs
Figure 2–3. Serial Master Transfer Modes
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| TLC320AD58CDWR | 2-CH 18-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PDSO28 |
| TLC320AD58CDW | 2-CH 18-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PDSO28 |
| TLC320AD77CDBLE | SPECIALTY CONSUMER CIRCUIT, PDSO28 |
| TLC320AD77CDBR | SPECIALTY CONSUMER CIRCUIT, PDSO28 |
| TLC320AD77CDBG4 | SPECIALTY CONSUMER CIRCUIT, PDSO28 |
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| TLC320AD58CDW | 制造商:TI 制造商全稱:Texas Instruments 功能描述:Sigma-Delta Stereo Analog-to-Digital Converter |
| TLC320AD58CDWR | 制造商:TI 制造商全稱:Texas Instruments 功能描述:Sigma-Delta Stereo Analog-to-Digital Converter |
| TLC320AD75 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:20-Bit Sigma-Delta Stereo ADA Circuit |
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