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參數(shù)資料
| 型號(hào)： | TISP61089ASD |
| 廠商： | BOURNS INC |
| 元件分類： | 保護(hù)電路 |
| 英文描述： | DUAL FORWARD-CONDUCTING P-GATE THYRISTORS PROGRAMMABLE OVERVOLTAGE PROTECTORS |
| 中文描述： | TELECOM, SURGE PROTECTION CIRCUIT, PDSO8 |
| 封裝： | SOP-8 |
| 文件頁(yè)數(shù)： | 2/8頁(yè) |
| 文件大?。?/td> | 259K |
| 代理商： | TISP61089ASD |
NOVEMBER 1995 - REVISED JANUARY 2007
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
TISP61089 Gated Protector Series
Absolute Maximum Ratings, -40
°
C
≤
TJ
≤
85
°
C (Unless Otherwise Noted)
Description
These ‘61089 parts are all dual forward-conducting buffered p-gate thyristor (SCR) overvoltage protectors. They are designed to protect
monolithic SLICs (Subscriber Line Interface Circuits) against overvoltages on the telephone line caused by lightning, a.c. power contact and
induction. The ‘61089 limits voltages that exceed the SLIC supply rail voltage. The ‘61089 parameters are specified to allow equipment
compliance with Telcordia (formally Bellcore) GR-1089-CORE and ITU-T recommendations K.20, K.21 and K.45.
The SLIC line driver section is typically powered from 0 V (ground) and a negative (battery) voltage. The protector gate is connected to this
negative supply. This references the protection (clipping) voltage to the negative supply voltage. The protection voltage will then track the
negative supply voltage and the overvoltage stress on the SLIC is minimized.
Positive overvoltages are clipped to ground by diode forward conduction. Negative overvoltages are initially clipped close to the SLIC
negative supply rail value. If sufficient current is available from the overvoltage, then the protector SCR will switch into a low voltage on-state
condition. As the overvoltage subsides the high holding current of ‘61089 SCR avoids d.c. latchup.
The ‘61089 is intended to be used with a series resistance of at least 25
and a suitable overcurrent function for Telcordia compliance. Power
fault conditions require a series overcurrent element which either interrupts or reduces the circuit current before the ‘61089 current rating is
exceeded. For equipment compliant to ITU-T recommendations K.20 or K.21 or K.45 only, the series resistor value is set by the coordination
requirements. For coordination with a 400 V limit GDT, a minimum series resistor value of 10
is recommended.
The ‘61089 buffered gate design reduces the loading on the SLIC supply during overvoltages caused by power cross and induction. The
regular pin-out for surface mount and through-hole packages is a feed through configuration. Connection to the SLIC is made via the ‘61089,
Ring through pins 4 - 5 and Tip through pins 1 - 8. A non-feed-through surface mount (D) package is available. This shunt (SD) version pin-out
does not make duplicate connections to pin 5 and pin 8 which increases package creepage distance from ground of the other connections
from about 0.7 mm to over 3 mm. High voltage ringing SLICs, with battery voltages below -100 V and down to -155 V, can be protected by the
TISP61089B device. Details of this device are in the TISP61089B data sheet.
Rating
Symbol
Value
Unit
Repetitive peak off-state voltage, V
GK
= 0
61089
‘61089A
V
DRM
-100
-120
V
Repetitive peak gate-cathode voltage, V
KA
= 0
61089
‘61089A
V
GKRM
-85
-120
V
Non-repetitive peak on-state pulse current (see Notes 1 and 2)
I
PPSM
A
10/1000
μ
s (Telcordia (Bellcore) GR-1089-CORE, Issue 2, February 1999, Section 4)
5/320
μ
s (ITU-T K.20, K.21& K.45, K.44 open-circuit voltage wave shape 10/700
μ
s)
1.2/50
μ
s (Telcordia (Bellcore) GR-1089-CORE, Issue 2, February 1999, Section 4)
2/10
μ
s (Telcordia (Bellcore) GR-1089-CORE, Issue 2, February 1999, Section 4)
30
40
100
120
Non-repetitive peak on-state current, V
GG
= -75 V, 50 Hz to 60 Hz (see Notes 1 and 2)
0.1 s
I
TSM
A
11
1 s
5 s
300 s
900 s
4.8
2.7
0.95
0.93
Non-repetitive peak gate current, 1/2
μ
s pulse, cathodes commoned (see Notes 1 and 2)
I
GSM
T
A
T
J
T
stg
+40
A
Operating free-air temperature range
-40 to +85
°
C
Junction temperature
-40 to +150
°
C
Storage temperature range
-40 to +150
°
C
NOTES: 1. Initially the protector must be in thermal equilibrium with -40
°
C
≤
T
J
≤
85
°
C. The surge may be repeated after the device returns
to its initial conditions. Gate voltage ranges are -20 V to -75 V for the ‘61089 and -20 V to -100 V for the ‘61089A.
2. The rated current values may be applied either to the Ring to Ground or to the Tip to Ground terminal pairs. Additionally, both
terminal pairs may have their rated current values applied simultaneously (in this case the Ground terminal current will be twice
the rated current value of an individual terminal pair). Above 85
°
C, derate linearly to zero at 150
°
C lead temperature.
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| TISP7015 | Three Terminal Very Low Voltage (VLV) Protection |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TISP61089ASDR | 功能描述:SCR Dual P Gate Forward Conducting RoHS:否 制造商:STMicroelectronics 最大轉(zhuǎn)折電流 IBO:480 A 額定重復(fù)關(guān)閉狀態(tài)電壓 VDRM:600 V 關(guān)閉狀態(tài)漏泄電流（在 VDRM IDRM 下）:5 uA 開(kāi)啟狀態(tài) RMS 電流 (It RMS): 正向電壓下降:1.6 V 柵觸發(fā)電壓 (Vgt):1.3 V 最大柵極峰值反向電壓:5 V 柵觸發(fā)電流 (Igt):35 mA 保持電流（Ih 最大值）:75 mA 安裝風(fēng)格:Through Hole 封裝 / 箱體:TO-220 封裝:Tube |
| TISP61089ASDR-S | 功能描述:SCR Dual P Gate Forward Conducting RoHS:否 制造商:STMicroelectronics 最大轉(zhuǎn)折電流 IBO:480 A 額定重復(fù)關(guān)閉狀態(tài)電壓 VDRM:600 V 關(guān)閉狀態(tài)漏泄電流（在 VDRM IDRM 下）:5 uA 開(kāi)啟狀態(tài) RMS 電流 (It RMS): 正向電壓下降:1.6 V 柵觸發(fā)電壓 (Vgt):1.3 V 最大柵極峰值反向電壓:5 V 柵觸發(fā)電流 (Igt):35 mA 保持電流（Ih 最大值）:75 mA 安裝風(fēng)格:Through Hole 封裝 / 箱體:TO-220 封裝:Tube |
| TISP61089ASDS | 制造商:Bourns Inc 功能描述: |
| TISP61089ASD-S | 功能描述:SCR Dual P Gate Forward Conducting RoHS:否 制造商:STMicroelectronics 最大轉(zhuǎn)折電流 IBO:480 A 額定重復(fù)關(guān)閉狀態(tài)電壓 VDRM:600 V 關(guān)閉狀態(tài)漏泄電流（在 VDRM IDRM 下）:5 uA 開(kāi)啟狀態(tài) RMS 電流 (It RMS): 正向電壓下降:1.6 V 柵觸發(fā)電壓 (Vgt):1.3 V 最大柵極峰值反向電壓:5 V 柵觸發(fā)電流 (Igt):35 mA 保持電流（Ih 最大值）:75 mA 安裝風(fēng)格:Through Hole 封裝 / 箱體:TO-220 封裝:Tube |
| TISP61089B | 制造商:Bourns Inc 功能描述:THYRISTOR TVS DUAL |
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