參數(shù)資料
型號： THS7360IPWR
廠商： TEXAS INSTRUMENTS INC
元件分類： 音頻／視頻放大
英文描述： VIDEO AMPLIFIER, PDSO20
封裝： GREEN, PLASTIC, TSSOP-20
文件頁數(shù)： 3/43頁
文件大小： 962K
代理商： THS7360IPWR
www.ti.com
SLOS674 – JUNE 2010
ELECTRICAL CHARACTERISTICS: VS+ = +5 V (continued)
At TA = +25°C, RL = 150 to GND, Filter mode, and dc-coupled input/output, unless otherwise noted.
THS7360
TEST
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
LEVEL(1)
DC PERFORMANCE
VIN = 0 V, SD channels
35
160
315
mV
A
Biased output voltage
VIN = 0 V, SF channels
35
120
300
mV
A
Input voltage range
DC input, limited by output range
–0.1/1
V
C
VIN = –0.1 V, SD channels
140
200
mA
A
Sync-tip clamp charge current
VIN = –0.1 V, SF channels
280
400
mA
A
Input impedance
800 || 2
k
|| pF
C
OUTPUT CHARACTERISTICS
RL = 150 to +2.5 V
4.85
V
C
RL = 150 to GND
4.4
4.75
V
A
High output voltage swing
RL = 75 to +2.5V
4.7
V
C
RL = 75 to GND
4.5
V
C
RL = 150 to +2.5 V (VIN = –0.2 V)
0.06
V
C
RL = 150 to GND (VIN = –0.2 V)
0.05
0.12
V
A
Low output voltage swing
RL = 75 to +2.5 V (VIN = –0.2 V)
0.1
V
C
RL = 75 to GND (VIN = –0.2 V)
0.05
V
C
Output current (sourcing)
RL = 10 to +2.5 V
90
mA
C
Output current (sinking)
RL = 10 to +2.5 V
85
mA
C
POWER SUPPLY
Operating voltage
2.6
5
5.5
V
B
VIN = 0 V, all channels on
19.7
25.5
31.2
mA
A
VIN = 0 V, SD channels on, SF channels off
6
7.5
9.5
mA
A
Total quiescent current, no load
VIN = 0 V, SD channels off, SF channels on
13.7
18
21.7
mA
A
VIN = 0 V, all channels off, VDISABLE = 3 V
0.5
10
mA
A
Power-supply rejection ratio
At dc
56
dB
C
(PSRR)
LOGIC CHARACTERISTICS(5)
VIH
Disabled or Bypass engaged
2.1
1.9
V
A
VIL
Enabled or Bypass disengaged
1.2
1
V
A
IIH
Applied voltage = 3.3 V
1
mA
C
IIL
Applied voltage = 0 V
1
mA
C
Disable time
100
ns
C
Enable time
100
ns
C
Bypass/filter switch time
10
ns
C
(5)
The logic input pins default to a logic '0' condition when left floating.
Table 2. TRUTH TABLE: VS+ = +5 V
(1)
FILTER 1
FILTER 2
BYPASS SF
DESCRIPTION
0
Selects the standard definition filter (9.2 MHz) for the SF channels
0
1
0
Selects the enhanced definition filter (17 MHz) for the SF channels
1
0
Selects the high-definition filter (35 MHz) for the SF channels
1
0
Selects the full/true high-definition filter (70 MHz) for the SF channels
X
1
Bypasses the filters for the SF channels
(1)
The logic input pins default to a logic '0' condition when left floating.
Copyright 2010, Texas Instruments Incorporated
11
Product Folder Link(s): THS7360
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