參數資料
型號： THS5671AIDWR
廠商： TEXAS INSTRUMENTS INC
元件分類： DAC
英文描述： PARALLEL, WORD INPUT LOADING, 0.035 us SETTLING TIME, 14-BIT DAC, PDSO28
封裝： GREEN, PLASTIC, SOIC-28
文件頁數： 29/33頁
文件大?。?/td> 1013K
代理商： THS5671AIDWR
THS5671A
14BIT, 125 MSPS, CommsDAC
DIGITALTOANALOG CONVERTER
SLAS201A DECEMBER 1999 REVISED SEPTEMBER 2002
5
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range, AVDD = 5 V,
DVDD = 5 V, IOUTFS = 20 mA, differential transformer coupled output, 50 doubly terminated load
(unless otherwise noted)
ac specifications
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Analog output
fCLK
Maximum output update rate
DVDD = 4.5 V to 5.5 V
100
125
MSPS
fCLK
Maximum output update rate
DVDD = 3 V to 3.6 V
70
100
MSPS
ts(DAC)
Output settling time to 0.1%
35
ns
tpd
Output propagation delay
1
ns
GE
Glitch energy
Worst case LSB transition (code 8191 code 8192)
5
pV-s
tr(IOUT) Output rise time 10% to 90%
1
ns
tf(IOUT)
Output fall time 90% to 10%
1
ns
Output noise
IOUTFS = 20 mA
15
pA/
√HZ
Output noise
IOUTFS = 2 mA
10
pA/
√HZ
AC linearity§
fCLK = 25 MSPS, fOUT = 1 MHz, TA = 25°C
74
THD
Total harmonic distortion
fCLK = 50 MSPS, fOUT = 1 MHz, TA = 40°C to 85°C
73
66
dBc
THD
Total harmonic distortion
fCLK = 50 MSPS, fOUT = 2 MHz, TA = 25°C
71
dBc
fCLK = 100 MSPS, fOUT = 2 MHz, TA = 25°C
71
fCLK = 25 MSPS, fOUT = 1 MHz, TA = 25°C
82
fCLK = 50 MSPS, fOUT= 1 MHz, TA = 40°C to 85°C
68
fCLK = 50 MSPS, fOUT = 1 MHz, TA = 25°C
82
dBc
Spurious free dynamic range to
fCLK = 50 MSPS, fOUT = 2.51 MHz, TA = 25°C
75
dBc
Spurious free dynamic range to
Nyquist
fCLK = 50 MSPS, fOUT = 5.02 MHz, TA = 25°C
74
SFDR
Nyquist
fCLK = 50 MSPS, fOUT = 20.2 MHz, TA = 25°C
57
SFDR
fCLK = 100 MSPS, fOUT = 5.04 MHz, TA = 25°C
70
dBc
fCLK = 100 MSPS, fOUT = 20.2 MHz, TA = 25°C
66
dBc
fCLK = 100 MSPS, fOUT = 40.4 MHz, TA = 25°C
63
dBc
Spurious free dynamic range
fCLK = 50 MSPS, fOUT = 1 MHz, TA= 25°C,1 MHz span
90
Spurious free dynamic range
within a window
fCLK = 50 MSPS, fOUT = 5.02 MHz, 2 MHz span
89
dBc
within a window
fCLK = 100 MSPS, fOUT= 5.04 MHz, 4 MHz span
89
dBc
Measured single ended into 50 load at IOUT1.
Single-ended output IOUT1, 50 doubly terminated load.
§ Measured with a 50%/50% duty cycle (high/low percentage of the clock). Optimum ac linearity is obtained when limiting the duty cycle to a range
from 45%/55% to 55%/45%.
相關PDF資料
PDF描述
THS5671AIPWR PARALLEL, WORD INPUT LOADING, 0.035 us SETTLING TIME, 14-BIT DAC, PDSO28
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相關代理商/技術參數
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THS5671AIPWR 功能描述:數模轉換器- DAC 14-Bit 125 MSPS CommsDAC RoHS:否 制造商:Texas Instruments 轉換器數量:1 DAC 輸出端數量:1 轉換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時間:1 us 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube
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