參數(shù)資料
型號: THS4601CDDA
廠商: Texas Instruments, Inc.
英文描述: WIDEBAND, FET-INPUT OPERATIONAL AMPLIFIER
中文描述: 寬帶,場效應管輸入運算放大器
文件頁數(shù): 13/27頁
文件大?。?/td> 381K
代理商: THS4601CDDA
THS4601
SLOS388B
OCTOBER 2001
REVISED JUNE 2002
13
www.ti.com
APPLICATION INFORMATION
designing the transimpedance circuit (continued)
As indicated, the current source typically sets the requirements for gain, speed, and dynamic range of the
amplifier. For a given amplifier and source combination, achievable performance is dictated by the following
parameters: the amplifier
s gain-bandwidth product, the amplifier
s input capacitance, the source capacitance,
the transimpedance gain, the amplifier
s slew rate, and the amplifier
s output swing. From this information, the
optimal performance of a transimpedance circuit using a given amplifier can be determined. Optimal is defined
here as providing the required transimpedance gain with a maximally flat frequency response.
For the circuit shown in Figure 26, all but one of the design parameters is known; the feedback capacitor must
be determined. Proper selection of the feedback capacitor prevents an unstable design, controls pulse
response characteristics, provides maximally flat transimpedance bandwidth, and limits broadband integrated
noise. The maximally flat frequency response results with C
F
calculated as shown in equation 1, where C
F
is
the feedback capacitor, R
F
is the feedback resistor, C
S
is the total source capacitance (including amplifier input
capacitance and parasitic capacitance at the inverting node), and GBP is the gain-bandwidth product of the
amplifier in hertz.
CF
1
RFGBP
1
RFGBP
2
4CS
RFGBP
2
Once the optimal feedback capacitor has been selected, the transimpedance bandwidth can be calculated with
equation 2.
F
3 dB
GBP
2 R
F
C
S
C
F
_
+
CIDIFF
CICM
CP
RF
CF
CD
IDIODE
NOTE: The total source capacitance is the sum of several distinct capacitances.
C
s
= C
ICM
+ C
IDIFF
+ C
P
+ C
D
Where: C
ICM
is the common-mode input capacitance.
C
IDIFF
is the differential input capacitance.
C
D
is the diode capacitance.
C
P
is parasitic capacitance at the inverting node.
Figure 27. Transimpedance Analysis Circuit
(1)
(2)
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