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參數(shù)資料
| 型號： | THS14F03IPFBG4 |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | ADC |
| 英文描述： | 1-CH 14-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQFP48 |
| 封裝： | GREEN, PLASTIC, TQFP-48 |
| 文件頁數(shù)： | 20/24頁 |
| 文件大?。?/td> | 329K |
| 代理商： | THS14F03IPFBG4 |
THS14F01, THS14F03
14-BIT, 1 MSPS/ 3 MSPS, DSP COMPATIBLE, ANALOG-TO-DIGITAL CONVERTERS
WITH FIFO INTERNAL REFERENCE AND PGA
SLAS285 – JUNE 2000
5
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
electrical characteristics (continued)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Reference Voltage
VBG
Bandgap voltage, internal mode
1.425
1.5
1.575
V
VBG
Input impedance
40
k
Positive reference voltage, REF+
2.5
V
Negative reference voltage, REF–
0.5
V
Reference difference,
REF, REF+ – REF–
2
V
Accuracy, internal reference
5%
Temperature coefficient
40
ppm/
°C
Voltage coefficient
200
ppm/V
Analog Inputs
Positive analog input, IN+
0
AVDD
V
Negative analog input, IN–
0
AVDD
V
Analog input voltage difference
Ain = IN+ – IN–, Vref = REF+ – REF–
–Vref
Vref
V
Input impedance
25
k
PGA range
0
7
dB
PGA step size
1
dB
PGA gain error
±0.25
dB
Digital Inputs
VIH
High-level digital input
2
V
VIL
Low-level digital input
0.8
V
Input capacitance
5
pF
Input current
±1
A
Digital Outputs
VOH
High-level digital output
IOH = 50 A
2.6
V
VOL
Low-level digital output
IOL = 50 A
0.4
V
IOZ
Output current, high impedance
±10
A
Clock Timing (CS low)
fCLK
Clock frequency
THS14F01
0.1
1
MHz
fCLK
Clock frequency
THS14F03
0.1
3
MHz
td
Output delay time
25
ns
Latency
9.5
Cycles
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