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參數(shù)資料
| 型號： | THS1050I |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | 10-BIT 50 MSPS IF SAMPLING COMMUNICATIONS ANALOG-TO-DIGITAL CONVERTER |
| 中文描述： | 10位50 MSPS的IF采樣通訊模擬到數(shù)字轉(zhuǎn)換器 |
| 文件頁數(shù)： | 3/20頁 |
| 文件大?。?/td> | 397K |
| 代理商： | THS1050I |
THS1050
10-BIT 50 MSPS IF SAMPLING COMMUNICATIONS
ANALOG-TO-DIGITAL CONVERTER
SLAS278 – APRIL 2000
3
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
detailed description
The THS1050 uses a differential pipeline architecture and assures no missing codes over the full operating
temperature range. The device uses a 1 bit per stage architecture in order to achieve the highest possible
bandwidth. The differential analog inputs are terminated with a 900-
resistor. The inputs are then fed to a unity
gain buffer followed by the S/H (sample and hold) stage. This S/H stage is a switched capacitor operational
amplifier based circuit, see Figure 3. The pipeline is a typical 1 bit per stage pipeline as shown in the functional
block diagram. The digital output of the 10 stages and the last 1 bit flash are sent to a digital correction logic
block which then outputs the final 10 bits.
absolute maximum ratings over operating free-air temperature (unless otherwise noted)
Supply voltage range: AV
DD
–0.5 V to 7 V
–0.5 V to 7 V
–0.5 V to 7 V
–0.3 V to 0.5 V
–0.5 V to 5 V
–0.5 V to 5 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DRV
DD
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage between AV
SS
and DV
SS
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage between DRV
DD
and DV
DD
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage between AV
DD
and DV
DD
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Digital data output
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CLK peak input current
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Peak total input current (all inputs)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range, T
A
: THS1050C
THS1050I
Storage temperature range
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead temperature 1,6 mm (1/16 inch) from the case for 10 seconds
DV
DD
–0.3 V to DV
DD
+0.3 V
20 mA
–30 mA
0
°
C to 70
°
C
–40
°
C to 85
°
C
– 65
°
C to 150
°
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
260
°
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
recommended operating conditions
PARAMETER
MIN
NOM
MAX
UNIT
Sample rate
1
50
MSPS
Analog supply voltage, AVDD
Digital supply voltage, DVDD
Digital output driver supply voltage, DRVDD
CLK + high level input voltage, VIH
CLK + low-level input voltage, VIL
CLK – high-level input voltage, VIH
CLK – low-level input voltage, VIL
CLK pulse-width high, tp(H)
CLK pulse-width low, tp(L)
Operating free-air temperature range, TA
Operating free-air temperature range, TA
4.75
5
5.25
V
4.75
5
5.25
V
3
3.3
5.25
V
4
5
5.5
V
0
1
V
4
5
5.5
V
0
1
V
9
10
ns
9
10
ns
°
C
°
C
THS1050C
0
70
THS1050I
–40
85
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