參數(shù)資料
型號: THS1040IDWR
廠商: Texas Instruments, Inc.
元件分類: ADC
英文描述: 3-V, 10-BIT , 40-MSPS CMOS ANALOG TO DIGITAL CONVERTER
中文描述: 3伏,10位,40 MSPS的CMOS模擬數(shù)字轉(zhuǎn)換器
文件頁數(shù): 27/32頁
文件大小: 545K
代理商: THS1040IDWR
SLAS290C OCTOBER 2001 REVISED OCTOBER 2004
27
www.ti.com
APPLICATION INFORMATION
supply decoupling
The analog (AV
DD
, AGND) and digital (DV
DD
, DGND) power supplies to the THS1040 must be separately
decoupled for best performance. Each supply needs at least a 10-
μ
F electrolytic or tantalum capacitor (as a
charge reservoir) and a 100-nF ceramic type capacitor placed as close as possible to the respective pins (to
suppress spikes and supply noise).
digital output loading and circuit board layout
The THS1040 outputs are capable of driving rail-to-rail with up to 10 pF of load per pin at 40-MHz clock frequency
and 3-V digital supply. Minimizing the load on the outputs improves THS1040 signal-to-noise performance by
reducing the switching noise coupling from the THS1040 output buffers to the internal analog circuits. The
output load capacitance can be minimized by buffering the THS1040 digital outputs with a low input capacitance
buffer placed as close to the output pins as physically possible, and by using the shortest possible tracks
between the THS1040 and this buffer. Inserting small resistors in the range 100
to 300
between the
THS1040 I/O outputs and their loads can help minimize the output-related noise in noise-critical applications.
Noise levels at the output buffers, which may affect the analog circuits within THS1040, increase with the digital
supply voltage. Where possible, consider using the lowest DV
DD
that the application can tolerate.
Use good layout practices when designing the application PCB to ensure that any off-chip return currents from
the THS1040 digital outputs (and any other digital circuits on the PCB) do not return via the supplies to any
sensitive analog circuits. The THS1040 should be soldered directly to the PCB for best performance. Socketing
the device degrades performance by adding parasitic socket inductance and capacitance to all pins.
user tips for obtaining best performance from the THS1040
Choose differential input mode for best distortion performance.
Choose a 2-V ADC input span for best noise performance.
Choose a 1-V ADC input span for best distortion performance.
Drive the clock input CLK from a low-jitter, fast logic stage, with a well-decoupled power supply and short
PCB traces.
Use a small RC filter (typically 20
and 20 pF) between the signal source(s) the AIN+ (and AIN) input(s)
when the systems bandwidth requirements allow this.
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THS1040IPW 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 10 Bit 40 MSPS Low Power ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
THS1040IPWG4 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 10 Bit 40 MSPS Low Power ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
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