參數(shù)資料
型號: THS0842EVM
廠商: Texas Instruments, Inc.
英文描述: THS0842EVM(THS0842評估板)
中文描述: THS0842EVM(THS0842評估板)
文件頁數(shù): 15/37頁
文件大?。?/td> 516K
代理商: THS0842EVM
Circuit Function
2-3
Circuit Functionality
2.3.2
External Clock
SMB Connector J4 can be used to input a clock signal to the board from an
external source. The input source should be a 50-
LVTTL square wave signal
with an amplitude of 3.3 V referenced to digital ground. This is the default setup
for the EVM.
2.4
Analog Output
The ADC digital data is buffered and sent to a pair of THS5651A DACs. The
5651 DACs latch the THS0842 data on COUT (Q-DAC) or /COUT (I-DAC). An
analog signal is generated on J1 for the I-output and J3 for the Q-output. The
DAC outputs can only be used when the THS0842 EVM is set up for dual-bus
mode (W8 installed, SELB low). For further information on the THS5651A,
please refer to the product folder on TI’s website:
http://www.ti.com/sc/docs/products/analog/ths5651a.html
2.5
Digital Output
The digital-output codes of the ADC are made available on two 26-pin headers
along with COUT and COUT. J2 provides access to the data from the I-input
and J5 provides access to the data from the Q-input. The output is 3.3 V TTL-
compatible.
Table 2–1.Daughtercard Connector J2
J2 Pin
Name
Function
J2 Pin
Name
Function
1
DA0
I
OUT
0
2
DGND
Ground
3
DA1
I
OUT
1
4
DGND
Ground
5
DA2
I
OUT
2
6
DGND
Ground
7
DA3
I
OUT
3
8
DGND
Ground
9
DA4
I
OUT
4
10
DGND
Ground
11
DA5
I
OUT
5
12
DGND
Ground
13
DA6
I
OUT
6
14
DGND
Ground
15
DA7
I
OUT
7
16
DGND
Ground
17
RSVD
NC
18
DGND
Ground
19
RSVD
NC
20
DGND
Ground
21
COUT
COUT clock
22
DGND
Ground
23
COUT
COUT clock
24
DGND
Ground
25
80 MHz
80-MHz clock
26
DGND
Ground
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