參數(shù)資料
型號(hào)： TFP513
廠商： Texas Instruments, Inc.
英文描述： TI PANELBUS DIGITAL TRANSMITTER
中文描述： 德州儀器PANELBUS數(shù)字發(fā)射機(jī)
文件頁(yè)數(shù)： 12/29頁(yè)
文件大?。?/td> 424K
代理商： TFP513
SLLS611 AUGUST 2004
12
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
universal graphics controller interface modes
Table 1 is a tabular representation of the different modes for the universal graphics controller interface. The
12-bit mode is selected when BSEL = 0 and the 24-bit mode when BSEL = 1. The 12-bit mode uses dual-edge
clocking and the 24-bit mode uses single-edge clocking. The EDGE input controls the latching edge in 24-bit
mode or the primary latching edge in 12-bit mode. When EDGE = 1, the data input is latched on the rising edge
of the input clock; and when EDGE = 0, the data input is latched on the falling edge of the input clock. A fully
differential input clock is available only in the low-swing mode. Single-ended clocking is not recommended in
the low-swing mode as this decreases common-mode noise rejection.
Note that BSEL, DSEL, and EDGE are determined by register CTL_1_MODE when I
2
C is enabled (ISEL = 1)
and by input pins when I
2
C is disabled (ISEL = 0).
Table 1. Universal Graphics Controller Interface Options
VREF
BSEL
EDGE
DSEL
BUS WIDTH
LATCH MODE
CLOCK EDGE
CLOCK MODE
0.55 V 0.9 V
0
0
0
12-bit
Dual-edge
Falling
Differential (see Notes 9 and 10)
0.55 V 0.9 V
0
0
1
12-bit
Dual-edge
Falling
Single-ended
0.55 V – 0.9 V
0
1
0
12-bit
Dual-edge
Rising
Differential (see Notes 9 and 10)
0.55 V 0.9 V
0
1
1
12-bit
Dual-edge
Rising
Single-ended
0.55 V – 0.9 V
1
0
0
24-bit
Single-edge
Falling
Single-ended
0.55 V – 0.9 V
1
0
1
24-bit
Single-edge
Falling
Differential (see Notes 9 and 11)
0.55 V – 0.9 V
1
1
0
24-bit
Single-edge
Rising
Single-ended
0.55 V – 0.9 V
1
1
1
24-bit
Single-edge
Rising
Differential (see Notes 9 and 11)
DVDD
DVDD
DVDD
DVDD
NOTES:
0
0
X
12-bit
Dual-edge
Falling
Single-ended (see Note 12)
0
1
X
12-bit
Dual-edge
Rising
Single-ended (see Note 12)
1
0
X
24-bit
Single-edge
Falling
Single-ended (see Note 12)
1
1
X
24-bit
Single-edge
Rising
Single-ended (see Note 12)
9. The differential clock input mode is only available in the low signal swing mode (that is, VREF
≤
0.9 V).
10. The TFP513 does not support a 12-bit, dual-clock, single-edge input clocking mode.
11. The TFP513 does not support a 24-bit, single-clock, dual-edge input clocking mode.
12. In the high-swing mode (VREF = DVDD), DSEL is a don’t care; therefore, the device is always in the single-ended latch mode.
相關(guān)PDF資料
PDF描述
TFP513PAP TI PANELBUS DIGITAL TRANSMITTER
TFP513PAPG4 TI PANELBUS DIGITAL TRANSMITTER
TFPT0603 Linear PTC Thermistors, Surface Mount Chip
TFPT0603L1002DF Linear PTC Thermistors, Surface Mount Chip
TFPT0603L1002DM Linear PTC Thermistors, Surface Mount Chip
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
TFP513PAP 制造商:Texas Instruments 功能描述:
TFP513PAPG4 制造商:TI 制造商全稱:Texas Instruments 功能描述:TI PANELBUS DIGITAL TRANSMITTER
TFP5N60 制造商:TAK_CHEONG 制造商全稱:Tak Cheong Electronics (Holdings) Co.,Ltd 功能描述:N-Channel Power MOSFET 4.5A, 600V, 2.4Ω
TFP61 制造商:HOFFMAN ENCLOSURES 功能描述:COOLING FAN PACKAGE, 6 IN;115V 50/60HZ;; 制造商:Pentair Technical Products / Hoffman 功能描述:COOLING FAN 140CFM 32W 制造商:HOFFMAN ENCLOSURES 功能描述:COOLING FAN, 140CFM, 32W 制造商:Pentair Technical Products / Hoffman 功能描述:COOLING FAN, 140CFM, 32W; Enclosure Material:ABS; Body Color:Black; External Height - Imperial:7.80"; External Height - Metric:198mm; External Width - Imperial:8.87"; External Width - Metric:225mm; External Depth - Imperial:3.8" ;RoHS Compliant: Yes
TFP61SS 制造商:Pentair Technical Products / Hoffman 功能描述:115V,50/60Hz,36/32W,0.45/0.36A ;RoHS Compliant: Yes
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*