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參數(shù)資料
| 型號： | TFDU5107-TT3 |
| 廠商： | Vishay Intertechnology,Inc. |
| 英文描述： | Integrated Low Profile Transceiver Module for Telecom Applications |
| 中文描述： | 超薄集成收發(fā)模塊的電信應(yīng)用 |
| 文件頁數(shù)： | 2/13頁 |
| 文件大?。?/td> | 233K |
| 代理商： | TFDU5107-TT3 |
TFDU5107
Vishay Semiconductors
Rev. A1.4, 01-Nov-02
2 (13)
www.vishay.com
Document Number 82534
Ordering Information
Part Number
TFDU5107–TR3
TFDU5107–TT3
Qty / Reel
1000 pcs
1000 pcs
Description
Oriented in carrier tape for side view surface mounting
Oriented in carrier tape for top view surface mounting
Functional Block Diagram
Comparator
Amplifier
AGC
Logic
Driver
Current controlled
driver
V
CC
SD
Txd
GND
Rxd
IRED Anode
IRED Cathode
V
logic
Figure 1. Functional Block Diagram
Pin Description
Pin Number
1
Function
IRED Anode
Description
I/O
Active
IRED Anode to be externally connected to directly to V
CC
.
Alternatively the current can be decreased by an external
resistor.This pin is allowed to be supplied from an uncontrolled
power supply separated from the controlled V
CC
supply
IRED Cathode IRED Cathode, internally connected to driver transistor
Txd
Transmit Data Input
Rxd
Received Data Output, push–pull CMOS driver output capable
of driving a standard CMOS or TTL load. No external pull–up
or pull–down resistor is required. Pin is floating with a weak
pull up to V
CC
, when device is in shutdown mode. Rxd output
is quiet during transmission.
SD
Shutdown, will switch the device into shutdown after a delay
of 1 ms
V
CC
Supply Voltage
V
logic
Defines the input and output logic swing voltage
GND
Ground
2
3
4
I
HIGH
LOW
O
5
I
HIGH
6
7
8
I
Baby Face (Universal)
Figure 2. Pinning
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