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參數(shù)資料
| 型號： | TFDU5107-TR3 |
| 廠商： | Vishay Intertechnology,Inc. |
| 英文描述： | Integrated Low Profile Transceiver Module for Telecom Applications |
| 中文描述： | 超薄集成收發(fā)模塊的電信應用 |
| 文件頁數(shù)： | 8/13頁 |
| 文件大?。?/td> | 233K |
| 代理商： | TFDU5107-TR3 |
TFDU5107
Vishay Semiconductors
Rev. A1.4, 01-Nov-02
8 (13)
www.vishay.com
Document Number 82534
Identification
The identification of the device can be recalled by
setting the SD active followed by activating Txd for a
short period. With the low going edge of Txd a single
pulse is generated at Rxd.
The SD is intendet to activate the shutdown function
after a delay of 1 ms. Therefore the full sequence
should be run with that 1 ms time limitation, see
drawing.
SD
Txd
Rxd
t
SD
: > 5 s
for “real” shutdown > 1 ms
t
Txd
: > 0.5 s to 2 s
t
delRxd
:
≥
10 ns
t
delTxd
:
≥
1 s
t
Rxd
= 400 ns
Figure 6.
V
logic
Setting
The logic voltage swing is set by applying an external voltage to the V
logic
pin.
Table 1. Truth table
Inputs
Txd
Outputs
SD
Optical input
Irradiance
mW/ m
2
x
Rxd
LED drive current
resulting intensity
I
e
in mW/ sr
0
high < 1 ms
pulse
low going Txd triggers monostable
to edit a 400 ns low pulse
floating (500 k
to V
dd
)
high
high > 1 ms
low
x
x
x
0
high
10 < I
e
< 300 defined by
an external resistor
0
0
0
low
low
low
high > 80
μ
s
low
low
x
high
high
< 4
> 40
low, pulse of 400 ns edge trig-
gered
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