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參數(shù)資料
| 型號： | TEF6890H/V2,557 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 消費家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP44 |
| 封裝： | 10 X 10 MM, 1.75 MM HEIGHT, PLASTIC, SOT-307-2, QFP-44 |
| 文件頁數(shù)： | 54/55頁 |
| 文件大?。?/td> | 315K |
| 代理商： | TEF6890H/V2,557 |
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2003 Oct 21
8
Philips Semiconductors
Product specication
Car radio integrated signal processor
TEF6890H
DGND
41
digital ground
SDA
42
I2C-bus data input or output
SCL
43
I2C-bus clock input
ADDR
44
address select input
SYMBOL
PIN
DESCRIPTION
handbook, full pagewidth
TEF6890H
MHC329
1
2
3
4
5
6
7
8
9
10
11
33
32
31
30
29
28
27
26
25
24
23
12
13
14
15
16
17
18
19
20
21
22
44
43
42
41
40
39
38
37
36
35
34
ADDR
SCL
SDA
DGND
i.c.
RDCL
RDDA
RDQ
i.c.
V
CC
AGND
CREF
i.c.
CDR
CDCM
CDL
LEVEL
RDSGND
SCLG
SDAG
FMMPX
MPXRDS
AM
i.c.
AFHOLD
AFSAMP
FREF
i.c.
NAV
i.c.
RROUT
LROUT
RFOUT
LFOUT
PHCM
PHONE
TAPEL
TAPER
Fig.2 Pin configuration.
7
FUNCTIONAL DESCRIPTION
7.1
Stereo decoder
The FMMPX input is the input for the MPX signal from the
tuner. The input gain can be selected in three settings to
match the input to the RF front-end circuit. A fourth setting
is used for weather band mode, which may require a gain
of 23.5 dB.
A low-pass filter provides the necessary signal delay for
FM noise blanking and suppression of high frequency
interferences into the stereo decoder input. The output
signal of this filter is fed to the roll-off correction circuit. This
circuit compensates the frequency response caused by
the low-pass characteristic of the tuner circuit with its
IF filters. The roll-off correction circuit is adjustable in four
settings to compensate different frequency responses of
the tuner part.
The MPX signal is decoded in the stereo decoder part.
A PLL is used for the regeneration of the 38 kHz
subcarrier. The fully integrated oscillator is adjusted by a
digital auxiliary PLL into the capture range of the main PLL.
The auxiliary PLL needs an external reference frequency
(75.4 kHz) which is provided by the tuner ICs of the NICE
family (TEA684x). The required 19 and 38 kHz signals are
generated by division of the oscillator output signal in a
logic circuit. The 19 kHz quadrature phase signal is fed to
the 19 kHz phase detector, where it is compared with the
incoming pilot tone. The DC output signal of the phase
detector controls the oscillator (PLL).
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TEF6892H | 制造商:PHI 功能描述:QFP/44 |
| TEF6892H/V2,518 | 功能描述:音頻 DSP ANALOG SIGNAL PROCESSOR RoHS:否 制造商:Texas Instruments 工作電源電壓: 電源電流: 工作溫度范圍: 安裝風(fēng)格: 封裝 / 箱體: 封裝:Tube |
| TEF6892H/V2,557 | 功能描述:音頻 DSP ANALOG SIGNAL PROCESSOR RoHS:否 制造商:Texas Instruments 工作電源電壓: 電源電流: 工作溫度范圍: 安裝風(fēng)格: 封裝 / 箱體: 封裝:Tube |
| TEF6892H/V3 | 功能描述:音頻 DSP ANALOG SGNL PROCESSR RoHS:否 制造商:Texas Instruments 工作電源電壓: 電源電流: 工作溫度范圍: 安裝風(fēng)格: 封裝 / 箱體: 封裝:Tube |
| TEF6892H/V3,518 | 功能描述:音頻 DSP ANALOG SGNL PROCESSR RoHS:否 制造商:Texas Instruments 工作電源電壓: 電源電流: 工作溫度范圍: 安裝風(fēng)格: 封裝 / 箱體: 封裝:Tube |
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