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參數(shù)資料
| 型號(hào)： | TEF6890H/V2,557 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP44 |
| 封裝： | 10 X 10 MM, 1.75 MM HEIGHT, PLASTIC, SOT-307-2, QFP-44 |
| 文件頁數(shù)： | 19/55頁 |
| 文件大?。?/td> | 315K |
| 代理商： | TEF6890H/V2,557 |
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2003 Oct 21
26
Philips Semiconductors
Product specication
Car radio integrated signal processor
TEF6890H
11.1.3
DATA BYTE 3; USN AND WAM
Table 9
Format of data byte 3
Table 10 Description of data byte 3
11.2
Write mode
Table 11 Format for subaddress byte with default setting
Table 12 Description of subaddress byte
Table 13 Selection of data byte
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
USN3
USN2
USN1
USN0
WAM3
WAM2
WAM1
WAM0
BIT
SYMBOL
DESCRIPTION
7 to 4
USN[3:0]
Ultrasonic noise detector. USN content of the MPXRDS audio signal; see Fig.5.
3 to 0
WAM[3:0]
Wideband AM detector. WAM content of the LEVEL voltage; see Fig.6.
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
AIOF
GATE
SGAT
SA4
SA3
SA2
SA1
SA0
00
BIT
SYMBOL
DESCRIPTION
7
AIOF
Auto-increment off. 0 = auto-increment enabled; 1 = auto-increment disabled.
6GATE
Gate. 0=I2C-bus outputs (SDAG and SCLG) are controllable by the shortgate or the
autogate function; 1 = I2C-bus outputs are enabled.
5
SGAT
Shortgate. 1=I2C-bus outputs (SDAG and SCLG) are enabled for a single
transmission following this control and disabled automatically.
4 to 0
SA[4:0]
Data byte select. The subaddress value is auto-incremented when AIOF = 0 and will
revert from SA = 30 to SA = 0. SA = 31 can only be accessed via direct subaddress
selection, in which case auto-increment will revert from SA = 31 to SA = 0; see
Table 13.
SA4
SA3
SA2
SA1
SA0
HEX(1)
MNEMONIC
ADDRESSED DATA BYTE
0
1
0
2
RDSCLK
clock of RDS/RBDS
0
1
0
4
CONTROL
control of supply and AF update
0
1
0
1
5
CSALIGN
alignment of stereo channel separation
0
1
0
6
MULTIPATH
control of weak signal sensitivity and timing
0
1
7
SNC
alignment of SNC start and slope
0
1
0
8
HIGHCUT
alignment of HCC start and slope
0
1
0
1
9
SOFTMUTE
alignment soft mute start and slope
0
1
0
1
0
A
RADIO
control of radio functions
0
1
0
1
B
INPUT/ASI
input selector and ASI settings
0
1
0
C
LOUDNESS
loudness control
0
1
0
1
D
VOLUME
volume control
0
1
0
E
TREBLE
treble control
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TEF6892H | 制造商:PHI 功能描述:QFP/44 |
| TEF6892H/V2,518 | 功能描述:音頻 DSP ANALOG SIGNAL PROCESSOR RoHS:否 制造商:Texas Instruments 工作電源電壓: 電源電流: 工作溫度范圍: 安裝風(fēng)格: 封裝 / 箱體: 封裝:Tube |
| TEF6892H/V2,557 | 功能描述:音頻 DSP ANALOG SIGNAL PROCESSOR RoHS:否 制造商:Texas Instruments 工作電源電壓: 電源電流: 工作溫度范圍: 安裝風(fēng)格: 封裝 / 箱體: 封裝:Tube |
| TEF6892H/V3 | 功能描述:音頻 DSP ANALOG SGNL PROCESSR RoHS:否 制造商:Texas Instruments 工作電源電壓: 電源電流: 工作溫度范圍: 安裝風(fēng)格: 封裝 / 箱體: 封裝:Tube |
| TEF6892H/V3,518 | 功能描述:音頻 DSP ANALOG SGNL PROCESSR RoHS:否 制造商:Texas Instruments 工作電源電壓: 電源電流: 工作溫度范圍: 安裝風(fēng)格: 封裝 / 箱體: 封裝:Tube |
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