參數(shù)資料
型號: TEA5777HN/N2,518
廠商: NXP SEMICONDUCTORS
元件分類: 接收器
英文描述: AM/FM, AUDIO SINGLE CHIP RECEIVER, PQCC48
封裝: 7 X 7 MM, 0.85 MM HEIGHT, PLASTIC, MO-220, SOT-619-1, HVQFN-48
文件頁數(shù): 9/47頁
文件大?。?/td> 219K
代理商: TEA5777HN/N2,518
TEA5777_1
Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet
Rev. 01 — 11 April 2006
17 of 47
Philips Semiconductors
TEA5777
Low-power AM/FM stereo radio for handheld applications
9.3.2 Read mode
The bus interface has a total of 3 read bytes. If a start of transmission is detected and the
I2C-bus device address matches with the internal address, an acknowledge is given and
the data is clocked out. If not, the internal clock is disabled and the data output will be
logic 1s (FFh).
9.3.3 Dbus function in I2C-bus mode (silent readout)
The Dbus function becomes active when bit DBUS = 1 and when the maximum available
bytes are written in the write mode or when the maximum available bytes are read in the
read mode. At every start of an I2C-bus data transfer, the Dbus mode is deactivated.
When the Dbus mode is active in I2C-bus mode, pin WRITE_READ becomes an
open-collector output (pull-up resistor required). Depending on the setting of bit IFCE and
bit SEARCH, the following data will be available at pin WRITE_READ:
Mono or stereo indication ag
IFC counter ag
SFOUND ag or BLIM reached ag
In Table 7 the data at pin WRITE_READ is depicted as a function of bits DBUS, SEARCH
and IFCE.
Table 5.
I2C-bus write mode
Condition
Byte
Description
START
start by master
Address byte
1100 0000 (bit R/W = 0)
ACK
acknowledge by slave
Byte 1
data byte 1
ACK
acknowledge by slave
Byte 2
data byte 2
ACK
acknowledge by slave
::
Byte 6
data byte 6
ACK
acknowledge by slave
STOP
stop by master
Table 6.
I2C-bus read mode
Condition
Byte
Description
START
start by master
Address byte
1100 0001 (bit R/W = 1)
ACK
acknowledge by slave
Byte 1
data byte 1
ACK
acknowledge by slave
Byte 2
data byte 2
ACK
acknowledge by slave
Byte 3
data byte 3
STOP
stop by master
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