
September 1994
5
Philips Semiconductors
Product specification
Supply circuit with power-down for
telephone set peripherals
TEA1081
Input and output currents I
1
and I
O
(pins 1 and 7)
The maximum available current into pin 1 (I
1
) is
determined by:
The minimum line current (I
LINEmin
) that is available for
the telephone set
The specified minimum input current (I
LNmin
) for the
speech/transmission circuit.
That is I
1max
= I
LINEmin
I
LNmin
.
At V
LN(rms)
< 150 mV, the input current I
1
is approximately:
I
1
= I
INT
+ k
×
I
O
(mA)
Where:
I
INT
= internal supply current (0.8 mA at V
LN
= 4 V);
k = correction factor (k < 1.1 for the specified output
current range).
With large line signals the instantaneous line voltage may
drop below V
O
+ 0.4 V. Normally (when V
LN
> V
O
+ 0.4 V),
instantaneous current flows from LN to QS (pin 1 to pin 7)
to the output load.
When V
LN
< V
O
+ 0.4 V, the instantaneous current is
diverted to pin 2 to prevent distortion of the line signal.
Fig.4 Output voltage as a function of line voltage.
R
V
connected between QS and VA.
(1) I
1
= 5 mA.
(2) I
1
= 20 mA.
(3) I
1
= 30 mA; not valid for TEA1081T.
handbook, halfpage
0
4
2
0
2
10
MLC169
4
6
8
(1)
(2)
(3)
VO
(V)
VLN
RV
75 k
50 k
Input current at V
LN(rms)
= 1 V and without R
V
approximates to:
I
1
= I
INT
+ 2
×
I
O
(mA)
The maximum supply current (within the specified output
current limits) available for peripheral devices is shown by:
I
Omax
=
Where:
I
LINEmin
is the minimum line current of the telephone set;
I
LNmin
is the specified minimum input current of the
speech/transmission circuit.
Input low-pass filter: IF (pin 5)
The input impedance between LN and VN at audio
frequencies is determined by the filter elements C
L
(between pins 1 and 5), R
L
(between pins 5 and 7) and the
internal resistor R
S
(typical value 20
).
At audio frequencies the TEA1081 behaves as an inductor
of the value L
I
= C
L
×
R
L
×
R
S
(H). The typical value of L
I
at
C
L
= 2.2
μ
F and R
L
= 100 k
is 4.4 H.
Amplifier decoupling: AD (pin 3)
To ensure stability, a 68 pF decoupling capacitor is
required between AD (pin 3) and LN (pin 1).
If I
Omin
< 1.5 mA, a 47 pF capacitor has to be added
between AD (pin 3) and VA (pin 6).
Power-down inputs: PD and SP (pins 4 and 8)
During pulse dialling or register recall, or if the input current
to pin 1 is insufficient to maintain the output current, the
supply to peripheral devices can be switched off by
activating the PD input at pin 4. With PD = HIGH, the input
current is reduced to 40
μ
A (typ.) at V
LN
= 4 V and the
internal circuits are isolated from the load at QS (pin 7).
The power-down circuit is supplied via the SP input (pin 8).
SP can be wired to QS in conditions where V
O
> V
SPmin
during line interruptions. When V
O
< V
SPmin
, SP should be
wired to an external supply point (e.g. to V
CC
of the
TEA1060 family circuit).
When power-down is not required, the PD and SP inputs
can be left open-circuit.
I
------------------------------------------------I
I
2
INT