參數(shù)資料
型號(hào): TE28F004SC-100
廠商: INTEL CORP
元件分類: DRAM
英文描述: BYTE-WIDE SmartVoltage FlashFile MEMORY FAMILY 4, 8, AND 16 MBIT
中文描述: 512K X 8 FLASH 3.3V PROM, 100 ns, PDSO40
封裝: 10 X 20 MM, TSOP-40
文件頁數(shù): 39/58頁
文件大小: 920K
代理商: TE28F004SC-100
28F004/400B3, 28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3
3UHOLPLQDU\
33
5.0
Reset Operations
0580_09
NOTES:
1. If t
PLPH
is <100 ns the device may still RESET but this is not guaranteed
2. .Sampled, but not 100% tested.
3. If RP# is asserted while a block erase or
word program operation is not executing, the reset will complete
within 100 ns.
Figure 9. AC Waveform: Deep Power-Down/Reset Operation
IH
V
IL
V
RP# (P)
PLPH
t
IH
V
IL
V
RP# (P)
PLPH
t
(A) Reset during Read Mode
Abort
Complete
PLRH
PHQV
PHWL
PHEL
t
t
t
PHQV
PHWL
t
t
t
(B) Reset during Program or Block Erase, <
PLPH
PLRH
t
t
IH
V
IL
V
RP# (P)
PLPH
t
Abort
Complete
PHQV
PHWL
PHEL
t
t
t
PLRH
t
Deep
Power-
Down
(C) Reset Program or Block Erase, >
PLRH
t
Reset Specifications
Symbol
Parameter
Notes
V
CC
= 2.7 V–3.6 V
Unit
Min
Max
t
PLPH
RP# Low to Reset during Read
(If RP# is tied to V
CC
, this specification is not applicable)
1,2
100
ns
t
PLRH
RP# Low to Reset during Block Erase or Program
2,3
22
μs
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