參數(shù)資料
型號(hào): TE28F004SC-100
廠商: INTEL CORP
元件分類: DRAM
英文描述: BYTE-WIDE SmartVoltage FlashFile MEMORY FAMILY 4, 8, AND 16 MBIT
中文描述: 512K X 8 FLASH 3.3V PROM, 100 ns, PDSO40
封裝: 10 X 20 MM, TSOP-40
文件頁(yè)數(shù): 29/58頁(yè)
文件大小: 920K
代理商: TE28F004SC-100
28F004/400B3, 28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3
3UHOLPLQDU\
23
4.5
AC Characteristics —Read Operations
NOTES:
1. OE# may be delayed up to t
ELQV–
t
GLQV
after the falling edge of CE# without impact on t
ELQV
.
2. Sampled, but not 100% tested.
See
Figure 7, “AC Waveform: Read Operations” on page 26
.
See
Figure 5, “Input/Output Reference Waveform” on page 22
for timing measurements and maximum allowable
input slew rate.
#
Sym
Parameter
Density
4/8 Mbit
Unit
Product
90 ns
110 ns
V
CC
3.0 V–3.6 V
2.7 V–3.6 V
3.0 V–3.6 V
2.7 V–3.6 V
Min
Max
Min
Max
Min
Max
Min
Max
R1
R2
R3
R4
R5
R6
R7
R8
R9
t
AVAV
t
AVQV
t
ELQV
t
GLQV
t
PHQV
t
ELQX
t
GLQX
t
EHQZ
t
GHQZ
Read Cycle Time
Address to Output Delay
CE# to Output Delay
(1)
OE# to Output Delay
(1)
RP# to Output Delay
CE# to Output in Low Z
(2)
OE# to Output in Low Z
(2)
CE# to Output in High Z
(2)
OE# to Output in High Z
(2)
Output Hold from Address,
CE#, or OE# Change,
Whichever Occurs First
(2)
80
90
100
110
ns
ns
ns
ns
ns
ns
ns
ns
ns
80
80
30
600
90
90
30
600
25
25
100
100
30
600
110
110
30
600
25
25
0
0
0
0
0
0
0
0
25
25
25
25
R10
t
OH
0
0
0
0
ns
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