參數(shù)資料
型號(hào)： TDK5100
廠(chǎng)商： INFINEON TECHNOLOGIES AG
英文描述： ASK/FSK Transmitter 868/433 MHz
中文描述： 詢(xún)價(jià)/ FSK發(fā)射器433分之868兆赫
文件頁(yè)數(shù)： 16/40頁(yè)
文件大?。?/td> 629K
代理商： TDK5100
Functional Description
2 - 10
TDK 5100
Wireless Components
Specification, October 2002
2.4.4 Low Power Detect
The supply voltage is sensed by a low power detector. When the supply voltage
drops below 2.15 V, the output LPD (pin 2) switches to the low-state. To mini-
mize the external component count, an internal pull-up current of 40 μA gives
the output a high-state at supply voltages above 2.15 V.
The output LPD (pin 2) can either be connected to ASKDTA (pin 6) to switch off
the PA as soon as the supply voltage drops below 2.15 V or it can be used to
inform a micro-controller to stop the transmission after the current data packet.
2.4.5 Power Modes
The IC provides three power modes, the POWER DOWN MODE, the PLL
ENABLE MODE and the TRANSMIT MODE.
2.4.5.1 Power Down Mode
In the POWER DOWN MODE the complete chip is switched off.
The current consumption is typically 0.3 nA at 3 V 25
°
C.
This current doubles every 8
°
C. The values for higher temperatures are
typically 14 nA at 85
°
C and typically 600 nA at 125
°
C.
2.4.5.2 PLL Enable Mode
In the PLL ENABLE MODE the PLL is switched on but the power amplifier is
turned off to avoid undesired power radiation during the time the PLL needs to
settle. The turn on time of the PLL is determined mainly by the turn on time of
the crystal oscillator and is less than 1 msec when the specified crystal is used.
The current consumption is typically 3.5 mA.
2.4.5.3 Transmit Mode
In the TRANSMIT MODE the PLL is switched on and the power amplifier is
turned on too.
The current consumption of the IC is typically 7 mA when using a proper trans-
forming network at PAOUT, see Figure 3-1.
2.4.5.4 Power mode control
The bias circuitry is powered up via a voltage V > 1.5 V at the pin PDWN (pin 1).
When the bias circuitry is powered up, the pins ASKDTA and FSKDTA are
pulled up internally.
Forcing the voltage at the pins low overrides the internally set state.
Alternatively, if the voltage at ASKDTA or FSKDTA is forced high externally, the
PDWN pin is pulled up internally via a current source. In this case, it is not nec-
essary to connect the PDWN pin, it is recommended to leave it open.
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