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參數(shù)資料
| 型號： | TDK5100 |
| 廠商： | INFINEON TECHNOLOGIES AG |
| 英文描述： | ASK/FSK Transmitter 868/433 MHz |
| 中文描述： | 詢價/ FSK發(fā)射器433分之868兆赫 |
| 文件頁數(shù)： | 14/40頁 |
| 文件大?。?/td> | 629K |
| 代理商： | TDK5100 |
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CSEL (pin 16)
Low
1)
Open
2)
Functional Description
2 - 8
TDK 5100
Wireless Components
Specification, October 2002
2.4
Functional Blocks
2.4.1 PLL Synthesizer
The Phase Locked Loop synthesizer consists of a Voltage Controlled Oscillator
(VCO), an asynchronous divider chain, a phase detector, a charge pump and a
loop filter. It is fully implemented on chip. The tuning circuit of the VCO consist-
ing of spiral inductors and varactor diodes is on chip, too. Therefore no addi-
tional external components are necessary. The nominal center frequency of the
VCO is 869 MHz. The oscillator signal is fed both, to the synthesizer divider
chain and to the power amplifier. The overall division ratio of the asynchronous
divider chain is 128 in case of a 6.78 MHz crystal or 64 in case of a 13.56 MHz
crystal and can be selected via CSEL (pin 16). The phase detector is a Type IV
PD with charge pump. The passive loop filter is realized on chip.
2.4.2 Crystal Oscillator
The crystal oscillator operates either at 6.78 MHz or at 13.56 MHz.
The reference frequency can be chosen by the signal at CSEL (pin 16).
For both quartz frequency options, 847.5 kHz or 3.39 MHz are available as out-
put frequencies of the clock output CLKOUT (pin 8) to drive the clock input of a
micro controller.
The frequency at CLKOUT (pin 8) is controlled by the signal at CLKDIV (pin 9)
Table 2-3
Crystal Frequency
6.78 MHz
13.56 MHz
1) Low:
2) Open:
Voltage at pin < 0.2 V
Pin open
Table 2-4
CLKDIV (pin 9)
Low
1)
Open
2)
CLKOUT Frequency
3.39 MHz
847.5 kHz
1) Low:
2) Open:
Voltage at pin < 0.2 V
Pin open
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| TDK5100F | 功能描述:射頻接收器 2.1-4 V ASK/FSK Transmitter IC RoHS:否 制造商:Skyworks Solutions, Inc. 類型:GPS Receiver 封裝 / 箱體:QFN-24 工作頻率:4.092 MHz 工作電源電壓:3.3 V 封裝:Reel |
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