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參數(shù)資料
| 型號： | TDC1147 |
| 廠商： | Fairchild Semiconductor Corporation |
| 英文描述： | 7-Bit, 15 Msps Monolithic Video A/D Converter(7位,15Msps 單片視頻A/D轉(zhuǎn)換器) |
| 中文描述： | 7位，15 Msps的單片視頻A / D轉(zhuǎn)換（7位，15Msps單片視頻的A / D轉(zhuǎn)換器） |
| 文件頁數(shù)： | 8/12頁 |
| 文件大小： | 75K |
| 代理商： | TDC1147 |
TDC1147
PRODUCT SPECIFICATION
8
Applications Discussion
Calibration
To calibrate the TDC1147, adjust V
RT
and V
RB
to set the 1st
and 127th thresholds to the desired voltages. Assuming a 0V
to -1V input range, continuously strobe the converter with
-0.0039V (1/2 LSB from 0V) on the analog input, and adjust
V
RT
for output toggling between codes 00 and 01. Then
apply -0.996V (1/2 LSB from -1V) and adjust V
RB
for
toggling between codes 126 and 127.
The degree of required adjustment is indicated by the offset
voltages, V
OT
and V
OB
. Offset voltages are generated by the
inherent parasitic resistance between the package pin and the
actual resistor chain on the integrated circuit. These parasitic
resistors are shown as R
1
and R
2
in the Block Diagram.
Calibration will cancel all offset voltages, eliminating offset
and gain errors.
The above method for calibration requires that both ends of
the resistor chain, R
T
and R
B
are driven by variable voltage
sources. Instead of adjusting V
RT
, R
T
can be connected to
analog ground and the 0V end of the range calibrated with an
input amplifier offset control. The offset error at the bottom
of the resistor chain causes a slight gain error, which can be
compensated for by varying the voltage applied to R
B
. The
bottom reference is a convenient point for gain adjust that is
not in the analog signal path.
Typical Interface Circuit
Figure 5 shows an example of a typical interface circuit for
the TDC1147. The analog input amplifier is a bipolar wide-
band operational amplifier, which is used to directly drive the
A/D converter. Bipolar inputs may be accommodated by
adjusting the offset control. A zener diode provides a stable
reference for both the offset and gain control. The amplifier
has a gain of -1 providing the recommended 1Vp-p input for
the A/D converter. Proper decoupling is recommended for all
supplies, although the degree of decoupling shown may not
be needed. A variable capacitor permits either step response
or frequency response optimization. This may be replaced
with a fixed capacitor, whose value depends upon the circuit
board layout and desired optimization.
The bottom reference voltage, V
RB
, is supplied by an invert-
ing amplifier, followed with a PNP transistor. The transistor
provides a low-impedance source and is necessary to sink
the current flowing through the reference resistor chain. The
bottom reference voltage can be adjusted to cancel the gain
error introduced by the offset voltage, V
OB
, as discussed in
the Calibration section.
Figure 5. Typical Interface Circuit
+5V
INPUT
2
R1
3
R2
R3
1K
R4
2K
R5
220
R7
1K
R11
Q1
U3
A741C
+
U2
+
C3
10
μ
F
25V
μ
F
C7
R10
C12
R6
2K
R12
27
TDC1047
10, 16
1
3, 12, 13, 22
24
23
4, 21
20
11,14
5
19
18
17
8
7
6
R13
R14
R15
R17
R18
R19
15
2
μ
F
C9
μ
F
C10
C1
10
μ
F
25V
L2
L1
10
3
3
4
2
–
–
7
6
8
14
1
1
C8
μ
F
C5
C2
70
μ
F
25V
C4
10
μ
F
25V
μ
F
C11
D
GND
V
IN
V
IN
V
CC
V
EE
A
GND
R
T
R
B
D
GND
D
1
(MSB)
D
7
(LSB)
D
2
D
3
9
R16
D
4
D
5
D
6
NLINV
NMINV
CLK
Notes:
1. Unless otherwise specified, all resistors are 1/4W, 2%.
2. R1 = Z
IN
–
– 0.001
1000 R2
1000 + R2
(
(
3. R2 =
2VRange
VREF ZIN
(
(
-5.2V
CONV
μ
F
C6
“GAIN”
R9
MULTITURN
2K
“OFFSET”
R8
MULTITURN
2K
+
+
+
U4
REFELM313
65-1147-06
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