參數(shù)資料
型號(hào): TDA9897HN/V3
廠商: NXP SEMICONDUCTORS
元件分類(lèi): 消費(fèi)家電
英文描述: SPECIALTY CONSUMER CIRCUIT, PQCC48
封裝: 7 X 7 MM, 0.85 MM HEIGHT, PLASTIC, MS-026, SOT619-1, HVQFN-48
文件頁(yè)數(shù): 32/103頁(yè)
文件大?。?/td> 529K
代理商: TDA9897HN/V3
TDA9897_TDA9898_4
NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 04 — 25 May 2009
34 of 103
NXP Semiconductors
TDA9897; TDA9898
Multistandard hybrid IF processing
[1]
In TAGC integral loop mode the pin TAGC provides sink and source currents for control. TakeOver Point
(TOP) is set via register TOPNEG W9[4:0].
Table 36.
W6 - data write register bit allocation
7
6
5
4
3
2
1
0
TAGC1
TAGC0
AGC2
AGC1
FMWIDE1
TWOFLO
VIDEO1V7
DIRECT
Table 37.
W6 - data write register bit description
Bit
Symbol
Description
7 and 6 TAGC[1:0]
tuner AGC mode[1]
00 = TAGC integral loop mode; all currents off
01 = TAGC integral loop mode; source current off
10 = TAGC integral loop mode
11 = TAGC derived from IF AGC; recommended for positive modulated
signals
5 and 4 AGC[2:1]
AGC mode and behavior; see Table 38
3
FMWIDE1
FM window
1 = 1 MHz
0 = see Table 27 bit FMWIDE0
2
TWOFLO
synthesizer frequency selection
1 = Japan mode (57 MHz)
0 = synthesizer mode
1
VIDEO1V7 video output level selection; sound carrier trap set to on (W2[0] = 1);
1 = 1.7 V at CVBS
0 = 2.0 V at CVBS
0
DIRECT
direct IF at DTV mode; TV set to DTV (W1[4] = 0); see Table 16 and
1 = direct IF output
0 = low IF output
Table 38.
AGC mode and behavior
Bit
VIF AGC
mode
SIF AGC
mode
MOD
FORCESP
AGC2
AGC1
W2[7]
W8[3]
W6[5]
W6[4]
0
normal
0
1
minimum gain
0
1
0
normal
0
1
normal
fast
0
1
X
fast
1
X
0
normal
1
X
0
1
minimum gain
1
X
1
0
2nd
normal
1
X
1
2nd fast
fast
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