參數(shù)資料
型號(hào): TDA9861
廠商: NXP SEMICONDUCTORS
元件分類: 音頻控制
英文描述: Universal HiFi audio processor for TV
中文描述: 2 CHANNEL(S), TONE CONTROL CIRCUIT, PDIP32
封裝: 0.400 INCH, PLASTIC, SOT-232-1, SDIP-32
文件頁數(shù): 5/18頁
文件大?。?/td> 108K
代理商: TDA9861
June 1994
5
Philips Semiconductors
Preliminary specification
Universal HiFi audio processor for TV
TDA9861
FUNCTIONAL DESCRIPTION
The TDA9861 consists of the following functions:
source select switching block
loudspeaker channel with effect controls
headphone channel
two port outputs for general purpose
I
2
C
bus control
Source select switching block
The TDA9861 selects and switches the input signals from
three stereo or six mono sources as there are MAIN, AUX
and SCART (Fig.1) to one of the outputs SCART,
loudspeaker and headphone (crossbar-switching Table 3).
Due to the fact, that the main channel (LINE outputs) is
looped outside the circuit (from pins 9 and 24 to pins 10
and 23), signals can be used as LINE output or to insert a
‘surround sound decoder’.
Loudspeaker channel
Volume control is divided into the parts volume 1 and
volume 2 / balance. The first part (55 dB) controls left and
right channels simultaneously; the second part (23 dB)
controls volume and balance of left and right channels
independently. Treble control provides a control range
from
12 to +12 dB and bass control from
12 to +15 dB.
Extended bass control can be provided by an external
T-network (Fig.1) from
15 to +19 dB (2 dB steps).
Effect controls
‘Linear stereo’, ‘stereo with spatial effect (30% or 52%
anti-phase crosstalk)’ and ‘forced mono with or without
pseudo-stereo effect’ are controlled by three bits. A muting
of 85 dB is provided.
Headphone channel
The headphone channel is only equipped with volume /
balance control. A muting of 85 dB is provided.
I
2
C-bus control
All settings of control are stored in subaddress registers.
Data transmission is simplified by auto-incrementing the
subaddresses. The on-chip power on reset sets the mute
bit to active, so all 3 stereo outputs are muted.
The muting can be switched off by writing a ‘0’ (non-muted)
into the mute control bits.
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
Notes to the Limiting Values
1.
Equivalent to discharging a 200 pF capacitor through a 0
series resistor.
2.
Equivalent to discharging a 100 pF capacitor through a 1.5 k
series resistor.
THERMAL RESISTANCE
SYMBOL
PARAMETER
MIN.
MAX.
UNIT
V
P
V
n
I
O
supply voltage (pin 6)
voltage on all pins, ground excluded
output current
at pins 15, 18, 13, 20, 7 and 26
at pins 2 and 31
total power dissipation
storage temperature
operating ambient temperature
electrostatic handling for all pins (note 1)
electrostatic handling for all pins (note 2)
0
0
10
V
P
V
V
25
0
2.5
1.5
850
+150
+70
±
300
±
2000
mA
mA
mW
°
C
°
C
V
V
P
tot
T
stg
T
amb
V
ESD
SYMBOL
PARAMETER
THERMAL RESISTANCE
R
th j-a
from junction to ambient in free air
60 K/W
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