參數(shù)資料
型號(hào): TDA9861
廠商: NXP SEMICONDUCTORS
元件分類: 音頻控制
英文描述: Universal HiFi audio processor for TV
中文描述: 2 CHANNEL(S), TONE CONTROL CIRCUIT, PDIP32
封裝: 0.400 INCH, PLASTIC, SOT-232-1, SDIP-32
文件頁(yè)數(shù): 11/18頁(yè)
文件大小: 108K
代理商: TDA9861
June 1994
11
Philips Semiconductors
Preliminary specification
Universal HiFi audio processor for TV
TDA9861
Table 2
Bits of data bytes.
Table 3
Output and input selection by subaddress bytes 07, 08 and 09.
Note
1.
X = don’t care
FUNCTION OF THE BITS IN TABLE 1
DESCRIPTION
V00 to V05
VL0 to VL4
VR0 to VR4
BA0 to BA4
TR0 to TR3
VHL0 to VHL5
VHR0 to VHR5
I00 to I03
I10 to I13
I20 to I23
MU0, MU1 and MU2
EF1, EF2 and ST
P1 and P2
volume control common for loudspeaker channel
volume control LEFT for loudspeaker channel
volume control RIGHT for loudspeaker channel
bass control for LEFT and RIGHT loudspeaker channel
treble control for LEFT and RIGHT loudspeaker channel
volume control LEFT for headphone channel
volume control RIGHT for headphone channel
input selection for headphone channel
input selection for SCART channel
input selection for loudspeaker channel
mute control bits: 0 = non-muted; 1 = muted
special mode control bits
control bits for ports P1 (pin 2) and P2 (pin 31);
output levels: 0 = LOW; 1 = HIGH
OUTPUT AND INPUT CONTROL BYTES, MUTE INCLUDED
(EFFECTS TABLE 4)
SELECT OUTPUT PINS
INPUT GROUP
INPUT
SIGNAL
ADDR
DATA BYTE TO SUBADDRESS
Loudspeaker channels
output pin 18
output pin 15
09
EF2 MU2
EF1 ST I23
I22
I21
I20
SCART channels
output pin 26
output pin 7
08
0
MU1
P1
P2
I13
I12
I11
I10
headphone channels
output pin 20
SELECT INPUT SIGNAL
PINS
28
30
28
1
32
1
output pin 13
07
HEX
0
MU0
0
0
I03
I02
I01
I00
BITS OF DATA BYTE
28
30
30
1
32
32
AUX LEFT
AUX RIGHT
AUX STEREO
SCART LEFT
SCART RIGHT
SCART
STEREO
MAIN LEFT
MAIN RIGHT
MAIN STEREO
V
i 1
V
i 2
V
i 1
and V
i 2
X7
V
i 3
V
i 4
V
i 3
and V
i 4
X6
XB
X9
X
X
X
X
X
X
0
0
0
0
0
0
X
X
X
X
X
X
X
X
X
X
X
X
1
1
0
1
0
0
0
0
1
0
1
1
1
0
1
1
0
1
1
1
1
0
1
0
XA
X5
3
5
3
3
5
5
V
i 5
V
i 6
V
i 5
and V
i 6
X8
XC
XD
X
X
X
0
0
0
X
X
X
X
X
X
1
1
1
1
1
0
0
0
0
0
1
0
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