參數(shù)資料
型號: TDA9855WP
廠商: NXP SEMICONDUCTORS
元件分類: 消費(fèi)家電
英文描述: I2C-bus controlled BTSC stereo/SAP decoder and audio processor
中文描述: SPECIALTY CONSUMER CIRCUIT, PQCC68
文件頁數(shù): 37/52頁
文件大?。?/td> 345K
代理商: TDA9855WP
1997 Nov 04
37
Philips Semiconductors
Product specification
I
2
C-bus controlled BTSC stereo/SAP
decoder and audio processor
TDA9855
APPLICATION HINTS
Selection of input signals by using the zero-crossing mute mode
(see Fig.11)
A selection between the internal signal path and the external input LIL/LIR produces a modulation click depending on the
difference of the signal values at the time of switching.
At t
1
the maximum possible difference between signals is 7 V (p-p) and gives a large click. Using the zero-crossing
detector no modulation click is audible.
For example: The selection is enabled at t
1
, the microcontroller sets the zero-crossing bit (TZCM = 1) and then the mute
bit (GMU = 1) via the I
2
C-bus. The output signal follows the input A signal, until the next zero-crossing occurs and then
activates mute.
After a fixed delay time before t
2
, the microcontroller has to send the forced mute mode (TZCM = 0) and the return to the
zero-crossing mode (TZCM = 1) to be sure that mute is enabled.
The output signal remains muted until the next signal zero-crossing of input B occurs, and then follows that signal.
The delay time t
2
t
1
is e.g. 40 ms. The zero-crossing function is working at the lowest frequency of 40 Hz.
Fig.11 Zero-crossing function; only one channel shown.
handbook, full pagewidth
V
t
t1
4
0
1
2
3
4
1
2
3
t2
MED436
(1)
(2)
(3)
(1) Input A (internal signal).
(2) Output.
(3) Input B (external input signal).
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