參數(shù)資料
型號(hào)： TDA9852
廠商： NXP SEMICONDUCTORS
元件分類： 消費(fèi)家電
英文描述： I2C-bus controlled BTSC stereo/SAP decoder and audio processor
中文描述： SPECIALTY CONSUMER CIRCUIT, PDIP42
文件頁(yè)數(shù)： 15/40頁(yè)
文件大?。?/td> 258K
代理商： TDA9852
1997 Mar 11
15
Philips Semiconductors
Preliminary specification
I
2
C-bus controlled BTSC stereo/SAP
decoder and audio processor
TDA9852
LINE OUT at pins LOL and LOR
V
o(rms)
nominal output voltage
(RMS value)
output headroom
output impedance
DC output voltage
output load resistance
output load capacitance
crosstalk L, R into SAP
100% modulation
500
mV
HEAD
o
Z
o
V
O
R
L
C
L
α
ct
9
0.45V
CC
0.5V
CC
5
50
80
120
0.55V
CC
V
2.5
dB
75
k
nF
dB
100% modulation; f
i
= 1 kHz;
L or R; mode selector switched
to SAP/SAP
100% modulation; f
i
= 1 kHz;
SAP; mode selector switched
to stereo
250 Hz to 6.3 kHz
crosstalk SAP into L, R
50
70
dB
V
ST-SAP
output voltage difference if
switched from L, R to SAP
3
dB
dbx noise reduction circuit
t
adj
stereo adjustment time
see Section “Adjustment
procedure” in Chapter
“Functional description”
I
s
can be measured at pin C
TS
via current meter connected to
1
2
V
CC
+ 1 V
1
s
I
s
nominal timing current for
nominal release rate of
spectral RMS detector
spread of timing current
timing current range
timing current for release rate
of wideband RMS detector
nominal RMS detector
release rate
24
μ
A
I
s
I
s range
I
t
15
±
30
1
3
I
s
+15
%
%
μ
A
7 steps via I
2
C-bus
Rel
rate
nominal timing current and
external capacitor values
wideband
spectral
125
381
dB/s
dB/s
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
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