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參數(shù)資料
| 型號(hào)： | TDA9160 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類(lèi)： | 顏色信號(hào)轉(zhuǎn)換 |
| 英文描述： | PAL/NTSC/SECAM decoder/sync processor(PAL/NTSC/SECAM譯碼器/ 同步處理器) |
| 中文描述： | COLOR SIGNAL DECODER, PDIP32 |
| 封裝： | 0.400 INCH, PLASTIC, SDIP-32 |
| 文件頁(yè)數(shù)： | 17/27頁(yè) |
| 文件大?。?/td> | 220K |
| 代理商： | TDA9160 |
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December 1991
17
Philips Semiconductors
Preliminary specification
PAL/NTSC/SECAM decoder/sync processor
TDA9160
B
bandwidth at
3 dB
f
SC
= 3.6 MHz
f
SC
= 4.4 MHz
SECAM
26
2.8
3.4
3.3
MHz
MHz
MHz
dB
SUPP
subcarrier suppression
C
HROMINANCE BANDPASS
f
res
resonant frequency
f
SC
= 3.6 MHz
f
SC
= 4.4 MHz
f
SC
= 3.6 MHz
f
SC
= 4.4 MHz
3.58
4.43
1.6
2
MHz
MHz
MHz
MHz
B
bandwidth at
3 dB
Cloche filter
f
res
B
resonant frequency
bandwidth
SECAM
at
3 dB; SECAM
4.26
241
4.29
268
4.31
295
MHz
kHz
Sync input
V
22
sync pulse amplitude
slicing level
delay of sync pulse due to
internal filter
noise detector threshold level
hysteresis
delay between video signal
and internally separated
vertical sync pulse
CVBS 1/2; S-VHS input 50
300
50
0.3
600
0.4
mV
%
μ
s
0.2
t
d
S/N
H
t
d
12
20
3
18.5
27
dB
dB
μ
s
Horizontal section
H
A
OUTPUT
(
PIN
10)
V
OH
V
OL
I
sink
I
source
t
W
t
d
output voltage HIGH
output voltage LOW
sink current
source current
pulse width
delay between middle of
horizontal sync pulse and
middle of H
A
2.4
2
2
0.3
5.0
0.3
4.7
0.45
5.5
0.6
0.6
V
V
mA
mA
μ
s
μ
s
32 clock cycles
note 2
F
IRST LOOP
f
frequency deviation when not
locked
supply voltage ripple rejection
temperature coefficient
catching range
holding range
static phase shift
1.5
%
SVRR
TC
f
CR
f
HR
φ
625
tbf
tbf
1400
0.1
V
Hz/
°
C
Hz
Hz
μ
s/kHz
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
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