參數(shù)資料
型號: TDA9116
廠商: STMICROELECTRONICS
元件分類: 偏轉(zhuǎn)
英文描述: HORIZ/VERT DEFLECTION IC, PDIP32
封裝: SHRINK, PLASTIC, DIP-32
文件頁數(shù): 8/47頁
文件大?。?/td> 725K
代理商: TDA9116
TDA9116
16/47
7.8 - DC/DC CONTROLLER SECTION
VCC = 12V, Tamb = 25°C
Note 35: A current sink is provided by the BComp output while BOut is disabled:
Note 36: Internal reference related to VRefO. The same values to be found on pin BRegIn, while regulation loop is
stabilized.
Note 37: Only applies to configuration specified in "Test conditions" column, i.e. synchronization of BOut “Off-to-On”
edge with horizontal flyback signal. Refer to chapter "DC/DC controller" for more details.
Note 38: tinh is about 300ns regardless of the H frequency
Symbol
Parameter
Test Conditions
Value
Units
Min.
Typ.
Max.
RB+FB
Ext. resistance applied between
BComp
output and BRegIn input
5k
AOLG
Open loop gain of error amplifier
on BRegIn input
Low frequency(18)
100
dB
fUGBW
Unity gain bandwidth of error am-
plifier on BRegIn input
(18)
6MHz
IRI
Bias current delivered by regula-
tion input BRegIn
-0.2
A
IBComp
Output current capability of BComp
output.
HBOutEn = "Enable"
HBOutEn = "Disable" (35)
-0.5
0.5
2.0
mA
ABISense
Voltage gain on BISense input
3
VThrBIsCurr
Threshold voltage on BISense input
corresponding to current limitation
TBD
2.1
V
IBISense
Input current sourced by BISense input
-1
A
tBOn
Conduction time of the power transistor (38)
TH -tinh
IBOut
Output current capability of BOut
output
010
mA
VBOSat
Saturation voltage of the internal output
transistor on BOut
IBOut=10mA
0.25
V
VBReg
Regulation reference for BRegIn
voltage(36)
VRefO=8V
BREF (Sad03):
x0000000b
x1000000b
x1111111b
3.8
4.9
6.0
V
tBTrigDel /TH
Delay of BOut “Off-to-On” edge after
middle of flyback pulse, as part of TH
(37)
BOutPh = "0"
16
%
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