- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄98204 > TDA9116 (STMICROELECTRONICS) HORIZ/VERT DEFLECTION IC, PDIP32 PDF資料下載
參數(shù)資料
| 型號： | TDA9116 |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | 偏轉(zhuǎn) |
| 英文描述： | HORIZ/VERT DEFLECTION IC, PDIP32 |
| 封裝： | SHRINK, PLASTIC, DIP-32 |
| 文件頁數(shù)： | 16/47頁 |
| 文件大?。?/td> | 725K |
| 代理商： | TDA9116 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁當(dāng)前第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁
TDA9116
23/47
Note 44: With exception of
HDUTY and BREF adjustments data that can take effect instantaneously if switches
HDutySyncV and B+SyncV are at 0 respectively.
Note 45: In Read Mode, the device always outputs data of the status register, regardless of sub address previously
selected.
Note 46: The TV, TH, TVM and THM bits are for testing purposes and must be kept at 0 by application.
Description of I2C Bus switches and flags
Write-to bits
Sad00/D7 - HDutySyncV
Synchronization of internal application of Hori-
zontal Duty cycle data, buffered in I2C Bus latch,
with internal discharge of Vertical oscillator
0: Asynchronous mode, new data applied
with ACK bit of I2C Bus transfer on this sub
address
1: Synchronous mode
Sad02/D7 - HMoiré
Horizontal Moiré characteristics
0: Adapted to an architecture with EHT gener-
ated in deflection section
1: Adapted to an architecture with separated
deflection and EHT sections
Sad03/D7 - B+SyncV
Same as HDutySyncV, applicable for B+ refer-
ence data
Sad06/D7 - BOutPol
Polarity of B+ drive signal on BOut pin
0: adapted to N type of power MOS - high
level to make it conductive
1: adapted to P type of power MOS - low level
to make it conductive
Sad07/D7 - BOutPh
Phase of start of B+ drive signal on BOut pin
0: Just after horizontal flyback pulse
1: With one of edges of line drive signal on
HOut pin, selected by BOHEdge bit
Sad08/D7 - EWTrHFr
Tracking of all corrections contained in wave-
form on pin EWOut with Horizontal Frequency
0: Not active
1: Active
Sad15/D7 - VDyCorPol
Polarity of Vertical Dynamic Correction wave-
form (parabola)
0: Concave (minimum in the middle of the pa-
rabola)
1: Convex (maximum in the middle of the pa-
rabola)
11
Reserved
PCAC
(Pin cushion asymmetry correction)
1000000
12
Reserved
PARAL
(Parallelogram correction)
1000000
13
Reserved
14
Reserved
15
VDyCorPol
0: ”
∪"
VDC-AMP
(Vertical dynamic correction amplitude)
1000000
16
XRayReset
0: No effect
1: Reset
VSyncAuto
1: On
VSyncSel
0:Comp
1:Sep
SDetReset
0: No effect
1: Reset
HMoiMode
0: Internal
1: External
PLL1Pump
1: Fast
0: Slow
PLL1InhEn
1: On
HLockEn
1: On
17
TV
0: Off(46)
TH
0: Off(46)
TVM
0: Off(46)
THM
0: Off(46)
BOHEdge
0: Falling
HBOutEn
0: Disable
VOutEn
0: Disable
BlankMode
1: Perm.
READ MODE (SLAVE ADDRESS = 8D)
XX
(45)
HLock
0: Locked
1: Not locked
VLock
0: Locked
1: Not lock.
XRayAlarm
1: On
0: Off
Polarity detection
Sync detection
HVPol
1: Negative
VPol
1: Negative
VExtrDet
0: Not det.
HVDet
0: Not det.
VDet
0: Not det.
Sad
D7
D6D5D4D3D2
D1
D0
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| TDA9141N | COLOR SIGNAL DECODER, PDIP32 |
| TDA9170N | SPECIALTY CONSUMER CIRCUIT, PDIP32 |
| TDA9177N | SPECIALTY CONSUMER CIRCUIT, PDIP24 |
| TDA9201 | 1 CHANNEL, VIDEO PREAMPLIFIER, PDIP20 |
| TDA9203A | 3 CHANNEL, VIDEO PREAMPLIFIER, PDIP24 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TDA9118 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:行/場掃描處理電路 |
| TDA9141 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:PAL/NTSC/SECAM decoder/sync processor |
| TDA9143 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:I2C-bus controlled, alignment-free PAL/NTSC/SECAM decoder/sync processor |
| TDA9144 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:I2C-bus controlled, alignment-free PAL/NTSC/SECAM decoder/sync processor with PALplus helper demodulator |
| TDA9150 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Programmable deflection controller |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。