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參數(shù)資料
| 型號： | TDA8779H |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 模擬信號調(diào)理 |
| 英文描述： | 10-bit converter interface ADC/DAC for quadrature transceiver |
| 中文描述： | SPECIALTY ANALOG CIRCUIT, PQFP44 |
| 封裝： | PLASTIC, QFP-44 |
| 文件頁數(shù)： | 9/20頁 |
| 文件大?。?/td> | 112K |
| 代理商： | TDA8779H |
1999 Sep 16
9
Philips Semiconductors
Product specification
10-bit converter interface (ADC/DAC) for
quadrature transceiver
TDA8779H
S
TANDBY MODE OUTPUT DELAY TIMES
; STDBYA; T
amb
= 25
°
C
t
d(stb)LH
standby delay
(LOW-to-HIGH transition)
t
d(stb)HL
start-up delay
(HIGH-to-LOW transition)
100
μ
s
100
μ
s
C
ROSSTALK ON THE
ADC
α
ct
crosstalk on the ADC
f
CLK(DAC)
= 16.384 MHz;
f
CLK(ADC)
= 8.192 MHz;
T
amb
= 25
°
C; both DACs
switching between input
codes 0 and 1023; one
ADC 1 V (p-p) sine wave
at 4 MHz and the other
ADC set at the middle
code
50
55
dB
DAC part
D
IGITAL INPUTS
: D0D
TO
D9D
AND
CLKD
V
IL
V
IH
I
IL
I
IH
D
IGITAL INPUT
; STDBYD
LOW-level input voltage
HIGH-level input voltage
LOW-level input current
HIGH-level input current
T
amb
= 25
°
C
T
amb
= 25
°
C
0
2.0
200
10
0.8
V
CCD2
0
+10
V
V
μ
A
μ
A
V
IL
V
IH
I
IL
I
IH
T
IMING
; T
amb
= 25
°
C (see Fig.5)
f
CLK(max)
maximum clock frequency
t
CH
clock pulse width HIGH
t
CL
clock pulse width LOW
t
r
clock rise time
t
f
clock fall time
t
s
input data set-up time
t
h
input data hold time
A
NALOG OUTPUTS
; note 3
LOW-level input voltage
HIGH-level input voltage
LOW-level input current
HIGH-level input current
T
amb
= 25
°
C
T
amb
= 25
°
C
0
2.0
10
10
0.8
V
CCD2
+10
+10
V
V
μ
A
μ
A
20
20
20
11
0
4
4
MHz
ns
ns
ns
ns
ns
ns
V
o(p-p)
output voltage
(peak-to-peak value)
output load impedance
full-scale
0.9
1
1.1
V
Z
oL
see Fig.6
15
0.3
pF
k
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
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