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參數(shù)資料
| 型號： | TDA8763 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | 10-bit high-speed low-power ADC with internal reference regulator |
| 中文描述： | 10位高速低的內(nèi)部參考調(diào)節(jié)功率ADC |
| 文件頁數(shù)： | 11/24頁 |
| 文件大?。?/td> | 174K |
| 代理商： | TDA8763 |
1999 Jan 06
11
Philips Semiconductors
Product specification
10-bit high-speed low-power ADC with
internal reference regulator
TDA8763
3.
In order to ensure the optimum linearity performance of such converter architecture the lower and upper extremities
of the converter reference resistor ladder (corresponding to output codes 0 and 1023 respectively) are connected to
pins V
RB
and V
RT
via offset resistors R
OB
and R
OT
as shown in Fig.3.
a) The current flowing into the resistor ladder is
and the full-scale input range at the converter,
to cover code 0 to code 1023, is
b) Since R
L
, R
OB
and R
OT
have similar behaviour with respect to process and temperature variation, the ratio
R
R
OB
R
L
R
OT
+
+
will be kept reasonably constant from device to device. Consequently variation of the output
codes at a given input voltage depends mainly on the difference V
RT
V
RB
and its variation with temperature and
supply voltage. When several ADCs are connected in parallel and fed with the same reference source, the
matching between each of them is then optimized.
4.
5.
The analog bandwidth is defined as the maximum input sine wave frequency which can be applied to the device.
No glitches greater than 2 LSBs, neither any significant attenuation are observed in the reconstructed signal.
The analog input settling time is the minimum time required for the input signal to be stabilized after a sharp full-scale
input (square wave signal) in order to sample the signal and obtain correct output data.
Effective bits are obtained via a Fast Fourier Transform (FFT) treatment taking 8 K acquisition points per equivalent
fundamental period. The calculation takes into account all harmonics and noise up to half of the clock frequency
(NYQUIST frequency). Conversion to signal-to-noise ratio: SINAD = EB
×
6.02 + 1.76 dB.
Intermodulation measured relative to either tone with analog input frequencies of 4.43 MHz and 4.53 MHz. The two
input signals have the same amplitude and the total amplitude of both signals provides full-scale to the converter.
Measurement carried out using video analyser VM700A, where the video analog signal is reconstructed through a
digital-to-analog converter.
10. Output data acquisition: the output data is available after the maximum delay time of t
d(max)
. For 50 MHz version it is
recommended to have the lowest possible output load.
6.
7.
8.
9.
I
L
V
V
+
R
OB
R
L
R
OT
+
-----------------------------------------
=
V
I
R
L
I
L
×
R
R
L
R
OB
R
OT
+
+
-----------------------------------------
=
=
V
(
RT
×
V
RB
)
–
0.848
V
(
RT
V
RB
)
–
×
=
-----------------------------------------
E
G
V
----------------------------------------V
V
–
V
i p
i p
p
–
(
)
p
–
(
)
100
×
=
Fig.3 Explanation of note 3.
handbook, halfpage
RLAD
ROT
VRT
VRM
VRB
ROB
code 1023
code 0
MGD281
IL
RL
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| TDA8763A | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:10-bit high-speed low-power ADC |
| TDA8763AM | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:10-bit high-speed low-power ADC |
| TDA8763AM/3 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:10-bit high-speed low-power ADC |
| TDA8763AM/3/C4,112 | 功能描述:視頻模擬/數(shù)字化轉(zhuǎn)換器集成電路 10 BIT A/D LOW POWER RoHS:否 制造商:Texas Instruments 輸入信號類型:Differential 轉(zhuǎn)換器數(shù)量:1 ADC 輸入端數(shù)量:4 轉(zhuǎn)換速率:3 Gbps 分辨率:8 bit 結(jié)構(gòu): 輸入電壓:3.3 V 接口類型:SPI 信噪比: 電壓參考: 電源電壓-最大:3.45 V 電源電壓-最小:3.15 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:TCSP-48 封裝:Reel |
| TDA8763AM/3/C4,118 | 功能描述:視頻模擬/數(shù)字化轉(zhuǎn)換器集成電路 10 BIT A/D LOW POWER RoHS:否 制造商:Texas Instruments 輸入信號類型:Differential 轉(zhuǎn)換器數(shù)量:1 ADC 輸入端數(shù)量:4 轉(zhuǎn)換速率:3 Gbps 分辨率:8 bit 結(jié)構(gòu): 輸入電壓:3.3 V 接口類型:SPI 信噪比: 電壓參考: 電源電壓-最大:3.45 V 電源電壓-最小:3.15 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:TCSP-48 封裝:Reel |
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