參數(shù)資料
型號(hào): TDA8758G
廠商: NXP SEMICONDUCTORS
元件分類: ADC
英文描述: YC 8-bit low-power analog-to-digital video interface
中文描述: 2-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQFP48
封裝: PLASTIC, SOT-313-2, LQFP-48
文件頁(yè)數(shù): 2/24頁(yè)
文件大?。?/td> 196K
代理商: TDA8758G
1996 Feb 01
2
Philips Semiconductors
Product specification
YC 8-bit low-power analog-to-digital
video interface
TDA8758
FEATURES
Two 8-bit ADCs:
– one Luminance or CVBS channel
– one Chrominance channel
Sampling rate up to 32 MHz
Binary or two's complement 3-state TTL outputs for
each channel
Internal reference voltage regulator
TTL-compatible digital inputs and outputs
Power dissipation of 530 mW (typical)
Input selector circuit (five selectable video inputs for
CVBS or YC processing)
Peak white enable input
Clamp and Automatic Gain Control (AGC) functions for
Y/CVBS channel (clamping on code 64 and Peak White
level control at code 255)
Clamp function for C channel (code 128)
No sample-and-hold circuit required.
APPLICATIONS
Video signal decoding
Digital picture processing
Frame grabbing
Multimedia with the Philips Desktop Video chip set (and
especially SAA7196 multistandard decoder and scaler).
GENERAL DESCRIPTION
The TDA8758 is an 8-bit video high-speed low-power
analog-to-digital conversion (ADC) interface for YC and
CVBS signal processing. It converts 1-of-3 CVBS input
signals or 1-of-2 YC input signals into binary or two’s
complement words at a sampling rate of 32 MHz.
All analog signal inputs are digitally clamped and an ADC
interface is provided on the Y/CVBS channel. A fast
precharge on clamp and AGC is provided for start-up.
All digital inputs and outputs are TTL compatible.
QUICK REFERENCE DATA
ORDERING INFORMATION
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
V
CCA
V
CCD
V
CCO
I
CCA
I
CCD
I
CCO
ILE
DLE
EB
analog supply voltage
digital supply voltage
output stages supply voltage
analog supply current
digital supply current
output supply current
DC integral linearity error
DC differential linearity error
effective bits
(from video input to digital outputs)
maximum clock frequency
maximum
3 dB bandwidth
(input preamplifier)
crosstalk between Y and C channels
and each video input
total power dissipation
4.75
4.75
4.75
5.0
5.0
5.0
59
28
19
±
0.75
±
0.4
7.1
5.25
5.25
5.25
70
40
28
±
1.5
±
1.0
V
V
V
mA
mA
mA
LSB
LSB
bits
C
L
= 15 pF
f
clk
= 32 MHz;
f
i
= 4.43 MHz
f
clk(max)
B
30
32
15
MHz
MHz
full-scale; 0 dB gain
α
ct
63
55
dB
P
tot
530
724
mW
TYPE
NUMBER
PACKAGE
NAME
DESCRIPTION
VERSION
TDA8758G
LQFP48
plastic low profile quad flat package; 48 leads; body 7
×
7
×
1.4 mm
SOT313-2
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