參數(shù)資料
型號: TDA8753A
廠商: NXP SEMICONDUCTORS
元件分類: 模擬信號調(diào)理
英文描述: YUV 8-bit analog-to-digital interface
中文描述: SPECIALTY ANALOG CIRCUIT, PDIP42
封裝: 0.600 INCH, PLASTIC, SOT-270-1, SDIP-42
文件頁數(shù): 9/20頁
文件大?。?/td> 111K
代理商: TDA8753A
1996 Jan 12
9
Philips Semiconductors
Product specification
YUV 8-bit analog-to-digital interface
TDA8753A
Timing (f
clk
= 20 MHz; C
L
= 15 pF);
see Figs 7 and 10; note 7
f
clk
t
CP(H)
t
CP(L)
t
ds
t
hd
t
d
t
CLKr
t
CLKf
t
su;Href
t
hd;Href
t
r
t
f
t
CLP
maximum input clock frequency
clock pulse width HIGH
clock pulse width LOW
sampling delay
output hold time
output delay time
clock rise time
clock fall time
HREF set-up time
HREF hold time
data output rise time
data output fall time
minimum time for active clamp
pulse width
WE set-up time
WE hold time
serial port clock cycle time
output data set-up to rising edge
of clock
output data hold time after rising
edge of clock
V50 pulse duration
V50 to clock time
20
22
22
7
3
3
7
3
2.3
4
5
5
10
10
2.5
32
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
μ
s
t
su;WE
t
hd;WE
t
XLXL
t
QVXH
7
3
1
700
ns
ns
μ
s
ns
f
xtal
= 12 MHz
t
XHQH
50
ns
t
W
t
VC
2
2
ms
ms
Sample rate converter (f
clk
= 20 MHz)
Φ
Y
Y phase accuracy
FUV
UV phase accuracy
Y
fr
Y frequency response
UV
fr
UV frequency response
Y
step
Y step size
UV
step
UV step size
f
iY
= 0 to 5 MHz
f
iUV
= 0 to 1.5 MHz
f
iY
= 0 to 5 MHz
f
iUV
= 0 to 1.5 MHz
±
1
±
4
±
0.5
±
0.5
1
4
ns
ns
dB
dB
ns
ns
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
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