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參數(shù)資料
| 型號： | TDA8745 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 消費家電 |
| 英文描述： | Satellite sound receiver with IIC-bus control(IIC總線控制的衛(wèi)星聲音接收器) |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PDIP42 |
| 封裝： | 0.600 INCH, PLASTIC, SOT-270-1, SDIP-42 |
| 文件頁數(shù)： | 24/40頁 |
| 文件大小： | 261K |
| 代理商： | TDA8745 |
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1996 Mar 11
24
Philips Semiconductors
Preliminary specification
Satellite sound receiver with I
2
C-bus control
TDA8745
Notes
1.
2.
Maximum of 0.5% THD at LF outputs.
When the increase of the output signal (pin 5 at 10.7 MHz) lags 1 dB behind the increase of the input signal
(pin 3; 7.02 MHz carrier), the so called 1 dB compression point is reached. For complex signals (more than one
sound carrier), this point will shift to a higher value.
The mixer performs both a mixing and amplifying action (normal operation). The synthesizer is tuned to the 7.3 MHz
incoming carrier.
The buffer output is sensitive to capacitive loading, therefore (capacitive) loads other than those present in the block
diagram (see Fig.1) should be avoided.
As present at the mixer output (pin 5) in ‘BPFTILT’ test mode the actual VCO sensitivity is two times the given value
because of the divide-by-two circuit between VCO output and mixer.
The required 4 MHz crystal can be omitted if this frequency is already available in the application. This signal source
should be connected to pin 40, via a capacitor in series with a resistor R
ext
. The minimum required AC current is
50
μ
A, determined by the resistors R
int
and R
ext
and the level of the 4 MHz AC voltage. The value of R
int
is 700
and the signal shape of the signal is not important.
3.
4.
5.
6.
SVRR
P1-P2
supply voltage ripple rejection
V
RR
= 100 mV; f
i
= 70 Hz;
NR = on; DEEM = 75
μ
s
V
RR
= 100 mV; f
i
= 1 kHz;
NR = on; DEEM = 75
μ
s
25
dB
4
dB
Output select
V
i 25,24
R
i 25,24,33,31
input voltage (pins 25 and 24)
input resistance at
pins 25, 24, 33 and 31
output voltage at pins 23 and 22
100
150
8
200
dBV
k
V
o 23,22
V
24,25
=
6 dBV;
OS = external
6.5
6
5.5
dBV
R
o 23,22,21
output resistance at
pins 23, 22 and 21
total harmonic distortion
100
125
150
THD
V
24,25
=
6 dBV;
OS = external; f = 1 kHz
A-weighted;
V
24,25
=
6 dBV;
OS = external
f = 1 kHz
0.01
0.3
%
S/N(A)
signal-to-noise ratio
80
dB
α
ct L/R
;
α
ct R/L
crosstalk between channels
80
dB
I
2
C-bus
C
i
I
sink
V
IH
V
IL
I
IH
I
IL
Address D4H
Address D6H
f
SCL
input capacitance
SDA sink current
HIGH level input voltage
LOW level input voltage
HIGH level input current
LOW level input current
address D4H
address D6H
SCL frequency
3
3
0
0
3
4
5
1.5
10
10
1
5
100
pF
mA
V
V
μ
A
μ
A
V
V
kHz
ADD
sel
= LOW
ADD
sel
= HIGH
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
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