參數(shù)資料
型號(hào): TDA8443A
廠商: NXP SEMICONDUCTORS
元件分類: 運(yùn)動(dòng)控制電子
英文描述: I2C-bus controlled YUV/RGB switch
中文描述: 6-CHANNEL, AUDIO/VIDEO SWITCH, PDIP24
封裝: 0.600 INCH, PLASTIC, MO-015AD, SOT-101-1, DIP-24
文件頁數(shù): 5/20頁
文件大?。?/td> 124K
代理商: TDA8443A
1995 Mar 07
5
Philips Semiconductors
Product specification
I
2
C-bus controlled YUV/RGB switch
TDA8443A
FUNCTIONAL DESCRIPTION
The circuit contains two sets of inputs (see Fig.1). Both
channels can receive RGB or YUV signals. Each set of
inputs has its own synchronization input, which internally
generates a pulse to clamp the inputs. The internal
clamping pulse can also be controlled by a signal (e.g. a
sandcastle pulse) applied to pin 24. The pulse will occur
during the time that the signal at pin 24 is between
5.5 and 6.5 V. If both a sync signal and a pin 24 signal are
used the signal should be applied to pin 24 via a 1 k
resistor.
RGB signals of Channel 2 can be matrixed to YUV signals.
The outputs can be set in a high impedance OFF state,
which allows the use of seven devices in parallel
(I
2
C-bus mode).
The circuit can be controlled by an I
2
C-bus compatible
microcontroller or directly by DC voltages. The fast
switching input can be operated via pin 16 of the
peritelevision connector.
I
2
C-bus mode
The protocol for the devices in I
2
C-bus mode is shown
in Fig.3.
Table 1
Protocol bit description
BIT
DESCRIPTION
STA
MA2 to MA0
ACK
D7
D6
D5 to D3
D2
D1 and D0
STO
start condition
address selection bits; see Table 2
acknowledge bit
channel selection bit; see Table 3
matrix selection bit; see Table 3
gain control bits; see Table 4
fast switching priority bit; see Table 5
output state control bits; see Table 6
stop condition
Fig.3 I
2
C-bus protocol.
handbook, full pagewidth
STA
1
1
0
1
MA2 MA1 MA0
0
ACK
D7
D6
D5
D4
D3
D2
D1
D0
ACK STO
MSA003
See Table 1.
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