參數(shù)資料
型號: TDA8376A
廠商: NXP Semiconductors N.V.
英文描述: I2C-bus controlled PAL/NTSC TV processors
中文描述: I2C總線控制的PAL / NTSC制式電視處理器
文件頁數(shù): 19/44頁
文件大?。?/td> 249K
代理商: TDA8376A
1996 Jan 26
19
Philips Semiconductors
Objective specification
I
2
C-bus controlled PAL/NTSC TV processors
TDA8376; TDA8376A
RGB inputs, colour difference inputs, luminance inputs and outputs
RGB
INPUTS
(
PINS
15
TO
17
AND
23
TO
25); note 5
V
i(p-p)
input signal voltage amplitude for an
output signal of 2 V (black-to-white)
at nominal controls
(peak-to-peak value)
input signal voltage amplitude
before clipping occurs
(peak-to-peak value)
difference between black level of
internal and external signals at the
outputs
input currents
delay difference for the three
channels
note 6
0.7
0.8
V
V
i(p-p)
note 2
1.0
V
V
o
20
mV
I
i
t
d
no clamping; note 7
note 2
0.1
0
20
μ
A
ns
F
AST BLANKING
(
PINS
14
AND
26)
V
i
input voltage
no data insertion
data insertion
data insertion
data insertion; note 5
0.9
100
0.4
3.0
V
V
V
ns
V
14,26(max)
t
d
maximum input pulse
delay time from RGB input to
RGB output
delay difference between data
insertion to RGB output and
RGB input to RGB output
input current
suppression of internal RGB signals
t
d
data insertion; note 5
50
ns
I
14,26
SS
int
55
0.2
mA
dB
notes 1 and 2; data
insertion; f
i
= 0 to 5 MHz
SS
ext
suppression of external RGB signals notes 1 and 2; no data
insertion; f
i
= 0 to 5 MHz
55
dB
V
14
input voltage to insert black level at
the RGB outputs to facilitate OSD
signals being applied to the outputs
4
V
C
OLOUR DIFFERENCE INPUT SIGNALS
(
PINS
31
AND
32)
input signal amplitude
(R
Y)
(peak-to-peak value)
V
31(p-p)
input signal amplitude
(B
Y)
(peak-to-peak value)
I
31,32
input current for both inputs
V
32(p-p)
note 7
1.05
V
note 7
1.35
V
note 7
0.1
1.0
μ
A
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
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