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參數(shù)資料
| 型號： | TDA8310 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 消費家電 |
| 英文描述： | PAL/NTSC colour processor for PIP applications |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PDIP52 |
| 封裝： | PLASTIC, SOT-247-1, SDIP-52 |
| 文件頁數(shù)： | 17/24頁 |
| 文件大?。?/td> | 92K |
| 代理商： | TDA8310 |
February 1995
17
Philips Semiconductors
Preliminary specification
PAL/NTSC colour processor for
PIP applications
TDA8310
Notes
1.
2.
On set AGC.
This parameter is not tested during production and is just given as application information for the designer of the
television receiver.
Measured with 0 dB = 500
μ
V.
Measured at 10 mV RMS top sync input signal.
So called projected zero point, i.e. with switched demodulator.
This parameter is not tested during production but is guaranteed by the design and qualified by means of matrix
batches which are made in the pilot production period.
Measured with a source impedance of 75
, where:
V
(black-to-white)
V
m rms
3.
4.
5.
6.
7.
8.
When the leakage current of the capacitor exceeds this value it will result in a reduced performance of the AGC
(amplitude variation during line or frame up to 20% maximum) but it will not result in a hang-up situation.
Signal with negative-going sync. Amplitude includes sync pulse amplitude.
10. Burst amplitude; for a colour bar with 75% saturation the chrominance signal amplitude is 660 mV (p-p).
11. The IC has two 3-level switch control inputs for the selection of the video signal for the decoder and synchronization
circuits. The video source for internal or external signal is selected via pin 32, also the polarity of the demodulation
for the internal signal. When the video switch is in the external position the voltage level of pin 9 determines whether
the video filters are switched to CVBS or Y/C. It is also possible via pin 9 to select an automatic detection of the
Y/C signal.
12. This value is internally generated when the pin is left open-circuit (the minimum value of the series resistor is 25 k
).
13. The
3 dB bandwidth of the circuit can be calculated by means of the following equation:
2Q
9.
14. Slicing level is independent of sync pulse amplitude.
15. The horizontal and vertical sync are stable while processing Copy Guard signals and signals with phase shifted sync
pulses (stretched tapes). Trick mode conditions of the VCR will also not disturb the synchronization. The value given
is the delay caused by the vertical sync pulse integrator. The integrator has been designed such that the vertical sync
is not disturbed for special anti-copy tapes with vertical sync pulses with an on/off time of 10/22
μ
s.
F
AST BLANKING OUTPUT
(
PIN
5)
V
OH
V
OL
Z
O
Z
O(off)
t
r
t
f
t
d
HIGH level output voltage
LOW level output voltage
output impedance
output impedance in the “off” state
rise time of the output pulse
fall time of the output pulse
delay difference between fast
blanking and RGB at the outputs
maximum load current
2
0
100
3
0.3
300
30
30
30
V
V
k
ns
ns
ns
I
load
1
mA
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
S/N = 20 log
)
B = 5 MHz
(
)
---------------------------------------------------------
f
3 dB
–
f
osc
1
-1
–
=
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TDA8310A | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:PAL/NTSC colour processor for PIP applications |
| TDA8310A/N1 | 制造商:NXP Semiconductors 功能描述: |
| TDA8315 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Integrated NTSC decoder and sync processor |
| TDA8315T | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Integrated NTSC decoder and sync processor |
| TDA8315TD-G | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:TV/Video Sync Circuit |
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