參數(shù)資料
型號: TDA7719
廠商: STMICROELECTRONICS
元件分類: 音頻控制
英文描述: 2 CHANNEL(S), TONE CONTROL CIRCUIT, PDSO28
封裝: ROHS COMPLIANT, MO-153AC, TSSOP-28
文件頁數(shù): 17/46頁
文件大?。?/td> 590K
代理商: TDA7719
Description
TDA7719
Doc ID 13698 Rev 4
4.10
Softstep control
In this device, the softstep function is available for volume, speaker, loudness, treble, middle
and bass block. With softstep function, the audible noise of DC offset or the sudden change
of signal can be avoided when adjusting gain setting of the block.
For each block, the softstep function is controlled by softstep on/off control bit in the control
table. The softstep transient time selection (5 ms or 10 ms) is common for all blocks and it is
controlled by softstep time control bit. The softstep operation of all blocks has a common
centralized control. In this case, a new softstep operation can not be started before the
completion previous softstep.
There are two different modes to activate the softstep operation. The softstep operation can
be started right after I2C data sending, or the softstep can be activated in parallel after data
sending of several different blocks. The two modes are controlled by the ‘a(chǎn)ct bit’ (it is
normally bit7 of the byte.) of each byte. When act bit is ‘0’, which means action, the softstep
is activated right after the date byte is sent. When the act bit is ‘1’, which means wait, the
block goes to wait for softstep status. In this case, the block will wait for some other block to
activate the operation. The softstep operation of all blocks in wait status will be done
together with the block which activate the softstep. With this mode, all specific blocks can do
the softstep in parallel. This avoids waiting when the softstep is operated one by one.
|
Softstep start here
|
Softstep start
here for all
1.
It is not allowed to cross 0 dB with softstep directly. From plus gain to minus gain, it
must go to +0 dB first, then destination. From minus gain to plus gain, it must go to -
0 dB first, and then destination.
2.
When one block is in ‘wait for softstep’ status, it is not allowed to send data to this block
again before its softstep is completed.
3.
To know if there is a softstep in operation, it is possible to monitor the ‘busy’ signal by
I2C transmission mode (Section 5.1.2). When softstep is busy (busy=0), it is better to
wait before sending new data until it is free (busy=1).
Chip Addr
Sub Addr
0xxxxxxx
Chip Addr
Sub Addr
1xxxxxxx
......
0xxxxxxx
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