參數(shù)資料
型號: TDA6650ATT/C3/S2
廠商: NXP SEMICONDUCTORS
元件分類: 消費(fèi)家電
英文描述: SPECIALTY CONSUMER CIRCUIT, PDSO38
封裝: 4.40 MM, 0.50 MM PITCH, PLASTIC, MO-153, SOT510-1, TSSOP-38
文件頁數(shù): 40/54頁
文件大?。?/td> 325K
代理商: TDA6650ATT/C3/S2
TDA6650ATT_6651ATT_2
NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 02 — 2 February 2007
45 of 54
NXP Semiconductors
TDA6650ATT; TDA6651ATT
5 V mixer/oscillator and low noise PLL synthesizer
13. Application information
13.1 Tuning amplier
The tuning amplier is capable of driving the varicap voltage without an external transistor.
The tuning voltage output must be connected to an external load of 15 k
which is
connected to the tuning voltage supply rail. The loop lter design depends on the oscillator
characteristics and the selected reference frequency as well as the required PLL loop
bandwidth.
Applications with the TDA6650ATT; TDA6651ATT have a large loop bandwidth, in the
order of a few tens of kHz. The calculation of the loop lter elements has to be done for
each application, it depends on the reference frequency and charge pump current.
13.2 Crystal oscillator
The TDA6650ATT; TDA6651ATT needs to be used with a 4 MHz crystal in series with a
capacitor with a typical value of 18 pF, connected between pin XTAL1 and pin XTAL2.
Philips crystal 4322 143 04093 is recommended. When choosing a crystal, take care to
select a crystal able to withstand the drive level of the TDA6650ATT; TDA6651ATT without
suffering from accelerated ageing. For optimum performances, it is highly recommended
to connect the 4 MHz crystal without any serial resistance.
The crystal oscillator of the TDA6650ATT; TDA6651ATT should not be driven (forced)
from an external signal. Do not use the signal on pins XTAL1 or XTAL2, or the signal
present on the crystal, to drive an external IC or for any other use as this may dramatically
degrade the phase noise performance of the TDA6650ATT; TDA6651ATT.
13.3 Examples of I2C-bus program sequences
Table 21 to Table 26 show various sequences where:
S=START
A = acknowledge
P=STOP.
The following conditions apply:
LO frequency is 800 MHz
fcomp = 142.86 kHz
N = 5600
BS3 output port is on and all other ports are off: thus the high band is selected
Charge pump current ICP = 600 A
Normal mode, with XTOUT buffer on
IAGC = 220 nA
AGC take-over point is set to 112 dB
V (p-p)
Address selection is adjusted to make address C2 valid.
To fully program the device, either sequence of Table 21 or Table 22 can be used, while
other arrangements of the bytes are also possible.
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