參數資料
型號： TDA6500TT/C4,118
廠商： NXP SEMICONDUCTORS
元件分類： 調諧器
英文描述： 3-BAND, VIDEO TUNER, PDSO32
封裝： 6.10 MM, 0.65 MM PITCH, PLASTIC, MO-153, SOT487-1, TSSOP-32
文件頁數： 36/37頁
文件大?。?/td> 223K
代理商： TDA6500TT/C4,118
9397 750 15057
Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 02 — 14 June 2005
8 of 37
Philips Semiconductors
TDA6500; TDA6501
5 V mixer/oscillator and synthesizer for PAL and NTSC standards
The module address contains programmable address bits (MA1 and MA0) which offer the
possibility of having up to 4 synthesizers in one system by applying a specic voltage on
the AS input. Table 7 gives the relationship between the input voltage applied to the AS
input and bits MA1 and MA0.
[1]
The ADC input cannot be used when these test modes are active; see Section 7.2.2 for more information.
[1]
The AGC detector is disabled. Both the sinking and sourcing currents from the IC are disabled. The AGC
output goes into a high-impedance state and an external AGC source can be connected in parallel.
[2]
The AGC detector is disabled and the fast mode current source is enabled.
Table 7:
I2C-bus address selection
Voltage applied to pin AS
MA1
MA0
0 V to 0.1VCC
00
0.2VCC to 0.3VCC or open
0
1
0.4VCC to 0.6VCC
10
0.9VCC to VCC
11
Table 8:
Test modes
T2
T1
T0
Test modes
0
normal mode
0
1
normal mode; default mode at power-on reset
0
1
0
charge pump is off
0
1
control byte is followed by auxiliary byte AB instead of the band
switch byte BB
1
0
charge pump is sinking current
1
charge pump is sourcing current
100
1
2fref is available on pin P6/ADC [1]
101
1
2fdiv is available on pin P6/ADC [1]
Table 9:
Reference divider ratio select
RSA
RSB
Reference divider ratio
0080
01128
1164
1
0
forbidden
Table 10:
AGC take-over point
AL2
AL1
AL0
Asymmetrical mode
0
115 dB
V
0
1
115 dB
V
0
1
0
112 dB
V; default mode at power-on reset
0
1
109 dB
V
1
0
106 dB
V
1
0
1
103 dB
V
110IAGC = 0 mA; external AGC [1]
1
3.5 V; disabled [1]
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