
TDA1085C
http://onsemi.com
6
APPLICATION NOTES
(Refer to Figure 4)
Printed Circuit Layout Rules
In the common applications, where TDA 1085C is used,
there is on the same board, presence of high voltage, high
currents as well as low voltage signals where millivolts
count. It is of first magnitude importance to separate them
from each other and to respect the following rules:
Capacitor decoupling pins, which are the inputs of the
same comparator, must be physically close to the IC,
close to each other and grounded in the same point.
Ground connection for tachogenerator must be directly
connected to Pin 8 and should ground only the tacho. In
effect, the latter is a first magnitude noise generator due
to its proximity to the motor which induces high d
φ
/dt
signals.
The ground pattern must be in the “star style” in order
to fully eliminate power currents flowing in the ground
network devoted to capacitors decoupling sensitive
Pins: 4, 5, 7, 11, 12, 14, 16.
As an example, Figure 5 presents a PC board pattern
which concerns the group of sensitive Pins and their
associated capacitors into which the a.m. rules have been
implemented. Notice the full separation of “Signal World”
from “Power”, one by line AB and their communication by
a unique strip.
These rules will lead to much satisfactory volume
production in the sense that speed adjustment will stay
valid in the entire speed range.
Power Supply
As dropping resistor dissipates noticeable power, it is
necessary to reduce the ICC needs down to a minimum.
Triggering pulses, if a certain number of repetitions are kept
in reserve to cope with motor brush wearing at the end of its
life, are the largest ICC user. Classical worst case
configuration has to be considered to select dropping
resistor. In addition, the parallel regulator must be always
into its dynamic range, i.e., IPin 10 over 1.0 mA and VPin 10
over 3.0 V in any extreme configuration. The double
filtering cell is mandatory.
Tachogenerator Circuit
The tacho signal voltage is proportional to the motor speed.
Stability considerations, in addition, require an RC filter, the
pole of which must be looked at. The combination of both
elements yield a constant amplitude signal on Pin 12 in most
of the speed range. It is recommended to verify this maximum
amplitude to be within 1.0 V peak in order to have the largest
signal/noise ratio without resetting the integrated circuit
(which occurs if VPin 12 reaches 5.5 V). It must be also verified
that the Pin 12 signal is approximately balanced between
“high” (over 300 mV) and “l(fā)ow”. An 8–poles tacho is a
minimum for low speed stability and a 16–poles is even better.
The RC pole of the tacho circuit should be chosen within
30 Hz in order to be as far as possible from the 150 Hz which
corresponds to the AC line 3rd harmonic generated by the
motor during starting procedure. In addition, a high value
resistor coming from VCC introduces a positive offset at Pin
12, removes noise to be interpreted as a tacho signal. This
offset should be designed in order to let Pin 12 reach at least
– 200 mV (negative voltage) at the lowest motor speed. We
remember the necessity of an individual tacho ground
connection.
Frequency to Voltage Converter – F V/C
CPin 11 has a recommended value of 820 pF for 8–poles
tachos and maximum motor rpm of 15000, and RPin 11 must
be always 470 K.
RPin 4 should be chosen to deliver within 12 V at
maximum motor speed in order to maximize signal/noise
ratio. As the FV/C ratio as well as the CPin 11 value are
dispersed, RPin 4 must be adjustable and should be made of
a fixed resistor in service with a trimmer representing 25%
of the total. Adjustment would become easier.
Once adjusted, for instance at maximum motor speed, the
FV/C presents a residual non linearity; the conversion factor
(mV per RPM) increases by within 7.7% as speed draws to
zero. The guaranteed dispersion of the latter being very
narrow, a maximum 1% speed error is guaranteed if during
Pin 5 network design the small set values are modified, once
forever, according this increase.
The following formulas give VPin 4:
VPin 4
G.0
(VCC–Va)
CPin 11
R4
f
(1
120k
RPin11
1
In volts.
G.0 . (VCC – Va)
Va = 2.0 VBE
120 k = Rint, on Pin 11
140
Speed Set (Pin 5)
Upon designer choice, a set of external resistors apply a
series of various voltages corresponding to the various
motor speeds. When switching external resistors, verify that
no voltage below 80 mV is ever applied to Pin 5. If so, a full
circuit reset will occur.
Ramps Generator (Pin 6)
If only a high acceleration ramp is needed, connect Pin 6
to ground.
When a Distribute ramp should occur, preset a voltage on
Pin 6 which corresponds to the motor speed starting ramp
point. Distribution (or low ramp) will continue up to the
moment the motor speed would have reached twice the
starting value.
The ratio of two is imposed by the IC. Nevertheless, it
could be externally changed downwards (Figure 6) or
upwards (Figure 7).
The distribution ramp can be shortened by an external
resistor from VCC charging CPin 7, adding its current to the
internal 5.0
μ
A generator.
Power Circuits
Triac Triggering pulse amplitude must be determined by
Pin 13 resistor according to the needs in Quadrant IV.