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參數(shù)資料
| 型號： | TCM37C15ADW |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | PCM COMBO WITH PROGRAMMABLE GAIN CONTROL |
| 中文描述： | 的PCM組合，具有可編程增益控制 |
| 文件頁數(shù)： | 17/23頁 |
| 文件大?。?/td> | 351K |
| 代理商： | TCM37C15ADW |
TCM37C14A, TCM37C15A
PCMCOMBO WITH PROGRAMMABLE GAIN CONTROL
SLWS018B – JUNE 1996 – REVISED MAY 1998
17
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PRINCIPLES OF OPERATION
miscellaneous functions (continued)
power-down and standby operations
To minimize power consumption, a power-down mode and three standby modes are provided. For power down,
low signals are applied to terminals GS0 and GS1. In the power-down mode, the average power consumption
is reduced to approximately 7 mW.
The three standby modes give the options of placing the entire device on standby, placing only the transmit
channel on standby, or placing only the receive channel on standby. To place the entire device on standby, both
FSX and FSR are held low. For transmit-only operation, FSX is high and FSR is held low. For receive-only
operation, FSR is high and FSX is low (see Table 3 for power-down and standby procedures).
Table 3. Power-Down and Standby Procedures
DEVICE STATUS
PROCEDURE
TYPICAL POWER
CONSUMPTION
DIGITAL OUTPUT STATUS
Power down
GS0 and GS1 are low.
7 mW
TSX and PCMOUT are in the high-impedance state.
Entire device on standby
FSX and FSR are low.
9 mW
TSX and PCMOUT are in the high-impedance state.
Only transmit on standby
FSX is low, FSR is high.
50 mW
TSX and PCMOUT are placed in the high-impedance state
within 300 ms.
Only receive on standby
FSR is low, FSX is high.
30 mW
fixed-data-rate timing
Fixed-data-rate timing uses master clock MCLK, frame synchronizer clocks FSX and FSR, and output TSX
(TCM37C14A only). An 8-kHz clock signal should be applied to the FSX and FSR inputs to set the sampling
frequency. Data is transmitted on PCMOUT on the first eight positive transitions of MCLK following the rising
edge of FSX. Data is received on PCMIN on the first eight falling edges of MCLK following FSR. A D/A
conversion is performed on the received digital word and the resulting analog sample voltage is held on an
internal sample-and-hold capacitor until transferred to the receive filter.
The TCM37C14A operates with MCLK frequencies of 1.536 MHz, 1.544 MHz, or 2.048 MHz, while the
TCM37C15A operates at 2.048 MHz.
precision voltage references
Voltage references that determine the gain and dynamic range characteristics of the device are generated
internally and require no external components to operate. A difference in subsurface charge density between
two suitably implanted MOS devices is used to derive a temperature- and bias-stable reference voltage. These
references are calibrated during the manufacturing process. Separate references are supplied to the transmit
and receive sections, and each is calibrated independently. Each reference value is then further trimmed by the
gain-setting operational amplifiers to a final precision value. Manufacturing tolerances of typically
±
0.04 dB in
absolute gain for each half channel can be achieved, providing a significant margin to compensate for error in
other board components.
conversion laws
The TCM37C14A provides pin-selectable
μ
-law or A-law operation as specified by the CCITT G.711
recommendation. A-law operation is selected when the ASEL terminal is connected to V
BB
and
μ
-law operation
is selected when the ASEL terminal is connected to V
CC
or
to GND.
The TCM37C15A provides A-law operation only.
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