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參數(shù)資料
| 型號： | TCM129C17ADW |
| 廠商： | Texas Instruments, Inc. |
| 元件分類： | Codec |
| 英文描述： | COMBINED SINGLE-CHIP PCM CODEC AND FILTER |
| 中文描述： | 聯(lián)合單芯片的PCM編解碼器和過濾器 |
| 文件頁數(shù)： | 4/25頁 |
| 文件大小： | 392K |
| 代理商： | TCM129C17ADW |
TCM29C13A, TCM29C14A, TCM29C16A, TCM29C17A,
TCM129C13A, TC,129C14A, TCM129C16A, TCM129C17A
COMBINED SINGLE-CHIP PCMCODEC AND FILTER
SCTS030E – AUGUST 1989 – REVISED OCTOBER 1996
4
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Terminal Functions (Continued)
TERMINAL
NO.
NAME
TCM29C13A
TCM129C13A
TCM29C14A
TCM129C14A
TCM29C16A
TCM29C17A
TCM129C16A
TCM129C17A
6
I/O
DESCRIPTION
PCM IN
8
10
I
Receive PCM input. PCM data is clocked in on PCM IN on eight
consecutive negative transitions of the receive data clock, which is
CLKR in fixed-data-rate timing and DCLKR in variable-data-rate
timing.
PCM OUT
13
16
11
O
Transmit PCM output. PCM data is clocked out on PCM OUT on eight
consecutive positive transitions of the transmit data clock, which is
CLKX in fixed-data-rate timing and DCLKX in variable-data-rate
timing.
PDN
5
5
4
I
Power-down select. The device is inactive with a TTL low-level input
to this PDN and active with a TTL high-level input to this PDN.
PWRO+
2
2
2
O
Noninverting output of power amplifier. PWRO+ drives transformer
hybrids or high-impedance loads directly in either a differential or a
single-ended configuration.
PWRO–
3
3
3
O
Inverting output of power amplifier. PWRO– is functionally identical
with and complementary to PWRO+.
SIGR
8
O
Signaling bit output, receive channel. In the fixed-data-rate mode,
SIGR outputs the logical state of the 8th bit (LSB) of the PCM word
in the most recent signaling frame.
A-law and
μ
-law operation select. When connected to VBB, A-law is
selected. When connected to VCC or GND,
μ
-law is selected. When
not connected to VBB, it is a TTL-level input that is transmitted as the
eighth bit (LBS) of the PCM word during signaling frames on PCM
OUT (TCM29C14A and TCM129C14A only). SIGX/ASEL is
internally connected to provide
μ
-law operational for TCM29C16A
and TCM129C16A and A-law operation for TCM29C17A and
TCM129C17A.
SIGX/ASEL
15
18
I
TSX/DCLKX
14
17
12
I/O
Transmit channel time-slot strobe (output) or data clock (input) for the
transmit channel. In the fixed-data-rate mode, TSX/DCLKX is an
open-drain output to be used as an enable signal for a 3-state output
buffer. In the variable-data-rate mode, DCLKX becomes the transmit
data clock, which operates at a TTL level from 64 kHz to 2.048 MHz.
VBB
VCC
1
1
1
Most negative supply voltage. Input is –5 V
±
5%.
Most positive supply voltage. Input is 5 V
±
5%.
20
24
16
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| TCM129C17AN | COMBINED SINGLE-CHIP PCM CODEC AND FILTER |
| TCM129C14A | Combined Single-Chip PCM Codec And Filter(單片PCM編碼譯碼器和濾波器) |
| TCM129C16A | Combined Single-Chip PCM Codec And Filter(單片PCM編碼譯碼器和濾波器) |
| TCM129C16AN | COMBINED SINGLE-CHIP PCM CODEC AND FILTER |
| TCM3105DJE | FSK MODEM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TCM129C17AN | 制造商:TI 制造商全稱:Texas Instruments 功能描述:COMBINED SINGLE-CHIP PCM CODEC AND FILTER |
| TCM129C17DW | 制造商:TI 制造商全稱:Texas Instruments 功能描述:COMBINED SINGLE-CHIP PCM CODEC AND FILTER |
| TCM129C17N | 制造商:TI 制造商全稱:Texas Instruments 功能描述:COMBINED SINGLE-CHIP PCM CODEC AND FILTER |
| TCM129C18 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:ANALOG INTERFACE FOR DSP |
| TCM129C18DW | 制造商:TI 制造商全稱:Texas Instruments 功能描述:ANALOG INTERFACE FOR DSP |
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