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參數(shù)資料
| 型號： | TC94A23F |
| 廠商： | Toshiba Corporation |
| 英文描述： | Single-chip CD Processor with Built-in Controller |
| 中文描述： | 單芯片的CD處理器的控制器，內(nèi)置 |
| 文件頁數(shù)： | 13/20頁 |
| 文件大?。?/td> | 219K |
| 代理商： | TC94A23F |
TC94A23F
2002-02-06
13
Pin
Number
Symbol
Pin Name
Function and Operation
Remarks
92
INTR
External interrupt
input
External interrupt input pin.
When interrupts are enabled and a pulse of
1.11 to 3.33 s or more (13.3 to 40 s when
the 75 kHz clock is used) is input to this pin,
an interrupt is generated and the program
jumps to address 1. Input logic and
rising/falling edge can be individually selected
for interrupt inputs.
The internal 8-bit timer clock can be selected
for interrupt inputs. Interrupts can be
generated (address 3) by pulse count or the
count value.
Interrupt inputs are Schmidt inputs. The pin
can be used as an input port for inputs such
as remote control signals.
93
MXO
94
MXI
Crystal oscillator pins
for controller
Crystal oscillator pins for the controller.
The oscillator clock is used as a time base for
the clock function as well as the system clock
for the controller. After system reset, the CPU
starts operation using the 16.9344 MHz CD
oscillator (connected to the XI and XO pins).
The oscillator is switched to the controller
oscillator by program. Either a 4.5 MHz
reference oscillator or a 75 kHz oscillator is
connected to the MXO and MXI pins.
The oscillators are switched by a bit used to
select a frequency of 4.5 MHz or 75 kHz. The
oscillators incorporate a feedback resistor.
Switching frequencies automatically switches
the feedback resistor of the crystal oscillator.
75 kHz: Rout2 2 K , RfXT2 10 M typ.
4.5 MHz: Rout2 2 K , RfXT2 1 M typ.
If the operating clock is the CD crystal
oscillator, fix the MXI pin to GND.
During execution of the CKSTP instruction,
oscillation halts.
Selection and control of crystal oscillators are
done by program.
(Note)
When the 75 kHz crystal oscillator is
used, externally add/connect a
100 k output resistor.
19, 96
MV
DD
20, 95
MV
SS
Power supply pins for
controller block
Power supply pins for the controller block.
Normally, V
DD
4.5 to 5.5 V.
In backup state (when executing the CKSTP
instruction), current dissipation becomes low
(1 A or below), dropping the power supply
voltage to 2.0 V.
If 2.7 V or more is applied to these pins when
at 0 V, a system reset is applied to the device
and the program starts from address 0
(power-on reset).
The CD processor incorporates a power
supply detector, which detects the power
supply voltage of 2.5 V.
(Note)
At power-on reset operation, allow
10 to 100 ms while the device power
supply voltage rises.
When not using the power supply detector
function, set the test port pins (TEST#0 to 3)
to all 1s so that the CD processor enters Halt
state. Setting to Halt state reduces current
dissipation by 150 A (typ.).
MV
DD
MXO
R
out2
R
fXT2
MXI
MV
DD
MV
SS
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