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參數(shù)資料
| 型號(hào)： | TC93P27F |
| 廠商： | Toshiba Corporation |
| 英文描述： | TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic |
| 中文描述： | 東芝的CMOS數(shù)字集成電路硅單片 |
| 文件頁數(shù)： | 10/16頁 |
| 文件大?。?/td> | 206K |
| 代理商： | TC93P27F |
TC93P27F
2002-11-18
10
Pin No.
Symbol
Pin Name
Function and Operation
Remarks
77
V
LCD
78
C
1
79
C
2
Voltage doubler
boosting pin
Voltage doubler boosting pin to drive the LCD.
A capacitor (0.1 to 3.3 F typ.) is connected to
boost the voltage.
The V
LCD
pin outputs voltage (3.1 V), which has
been doubled from the constant voltage (V
EE
: 1.55
V) using the capacitor connected between C
1
and
C
2
. This potential is supplied to the LCD driver.
If the internal V
LCD
OFF bit is set to “1” by program,
an external supply can be input through the V
LCD
pin to drive the LCD.
At this time, the V
LCD
/2 potential, whose V
LCD
voltage divided using resisters, is output from the
C
2
pin.
80
V
EE
Constant voltage
supply pin
1.55 V constant voltage supply pin to drive the LCD.
A stabilizing capacitor (0.47 F typ.) is connected.
This is a reference voltage for the A/D converter,
key input, and the bias potential of the LCD
common output.
Note 1: When the device is reset (V
DD
0 V
the pins for both LCD output and I/O ports and additional functions (e.g., SIO, A/D converter) are set to I/O
port input pins, while the IF
IN
/IN1/SC
IN
pins become IF input pins.
1.8 V or higher or
RESET
“L”
“H”) I/O ports are set to input,
Note 2: When in PLL OFF mode (when the three bits in the internal reference ports are all set to “1”), the IF
IN
/SC
IN
and FM
IN
, AM
IN
pins are pulled down, and DO1 and DO2 are at high impedance.
Note 3: When in CLOCK STOP mode (during execution of CKSTP instruction), the output ports (excluding OT1
output) and LCD output pins are all at low level, while the constant voltage circuit (V
EE
), the voltage doubler
circuit (V
LCD
), and the power supply for the crystal oscillator (V
XT
) are at V
DD
level.
Note 4: When the device is being reset, the contents of the output ports and internal ports are undefined and must
be initialized via software.
Note 5: When the pins for both LCD output and I/O ports are set to the I/O port, V
LCD
potential is used as the power
supply for the output, so the V
LCD
level is output at “H” level. In addition, the input power supply is at V
DD
level, so it can be used in the same way as for the other I/O port inputs.
V
LCD
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