
TC9028P/F
2002-01-08
13
4.1.1
Hold mode
Hold mode is activated by executing the hold instruction [HOLD]. Hold mode continues as long as
the HCAN pins are at low level.
The following states are held during hold mode.
(1) Oscillation stops and all internal operations stop.
(2) The timer counter is cleared to 0.
(3) Data memory, registers, and port latches hold the states immediately before entering hold
mode. (Note that the status flag is set to 1.)
(4) The program counter holds the 2 addresses after the hold instruction.
(After hold mode is cancelled, execution resumes with the instruction following the hold
instruction.)
4.1.2
Hold mode cancellation
Hold mode is cancelled and normal operation resumes when high level is input to the HCAN pins
during hold mode.
Hold mode is cancelled in the following sequence.
(1) Oscillation begins.
(2) Warming-up for the time required to stabilize oscillation. Internal operation remains stopped
during warming-up.
The warming-up time is 211/fc (s).
(3) After the warming-up time has elapsed, normal operation resumes from the instruction
following the hold instruction.
Note 2: The fundamental clock is divided by the interval timer. If the oscillation frequency fluctuates
after hold mode is cancelled, the warming-up time is not exactly the same as the value given
above. Thus, the warming-up time has allowance.
Hold mode is also cancelled by setting the RST pin to low level. In this case, the reset operation
is performed immediately. Since normal operation begins at the same time the reset operation is
cancelled, the RST pin must be kept at the low level for the warming-up time until oscillation
becomes stable.
If input to the HCAN pin is at high level, executing the hold instruction does not enter hold mode
but instead moves immediately to the cancellation sequence (warming-up). The warming-up time
in this case is an undefined value between 0~211/fc (s). Therefore, when the hold instruction is
executed, input to the HCAN pin must be set to low level.