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參數(shù)資料
| 型號： | TC9028P |
| 元件分類： | 搖控器 |
| 英文描述： | INFRARED, TRANSMITTER IC, PDIP20 |
| 封裝： | 0.300 INCH, 2.54 MM PITCH, PLASTIC, DIP-20 |
| 文件頁數(shù)： | 2/21頁 |
| 文件大?。?/td> | 571K |
| 代理商： | TC9028P |
TC9028P/F
2002-01-08
10
P53 is for large current output for driving the infrared LED. Resetting the output latch to 1 outputs
fosc/12 (duty 1/3) or fosc/8 (duty 1/2) sub-carrier frequency for modulation. An option allows selection
of fosc/24 (duty 1/3) or fosc/16 (duty 1/2) sub-carrier frequency. Sub-carrier frequency (duty) is selected
by the command register. The latch is initialized to 0 at reset.
The LSB (P50) of the port P5 is used for selecting the sub-carrier frequency (duty) output from P53
using the write-only command register.
The latch is initialized to 0 at reset.
Although port P5 is an output port, when an input instruction is executed, P5 can read timer/counter
output (IT3~IT0).
Port P5, Command Register (port address OP05) and, Timer/Counter Output (port address IP05)
Figure 3.3 Port P5
3.2
Timer/counter
The timer/counter is a 17 step binary counter used to divide the fundamental clock. It outputs a pulse
with a cycle selected from steps 10 through 15.
The timer/counter is a 17 step binary counter used to divide the fundamental clock. It outputs a pulse
with a cycle selected from steps 10 through 15.
The uses of the timer/counter are listed below. The timer/counter is cleared to 0 at reset, when a timer
reset instruction (TMRST) is executed, and when hold mode is cancelled.
(1) Timer generating fc/210~fc/215 (Hz) pulses
(2) Watchdog timer
(3) Warming-up timer when hold mode is cancelled
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