參數(shù)資料
型號: TC850CPL
廠商: Microchip Technology
文件頁數(shù): 12/26頁
文件大?。?/td> 0K
描述: IC ADC 15BIT FAST 40DIP
標準包裝: 10
位數(shù): 15
采樣率(每秒): 40
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 1
電壓電源: 雙 ±
工作溫度: 0°C ~ 70°C
安裝類型: 通孔
封裝/外殼: 40-DIP(0.600",15.24mm)
供應商設備封裝: 40-PDIP
包裝: 管件
輸入數(shù)目和類型: 1 個差分,單極
TC850
DS21479C-page 2
2006 Microchip Technology Inc.
General Description:
The TC850 is a monolithic CMOS A/D converter (ADC)
with resolution of 15-bits plus sign. It combines a
chopper-stabilized buffer and integrator with a unique
multiple-slope integration technique that increases
conversion speed. The result is 16 times improvement
in speed over previous 15-bit, monolithic integrating
ADCs (from 2.5 conversions per second up to 40 per
second).
Faster
conversion
speed
is
especially
welcome in systems with human interface, such as
digital scales.
The TC850 incorporates an ADC and a
μP-compatible
digital interface. Only a voltage reference and a few,
noncritical, passive components are required to form a
complete 15-bit plus sign ADC. CMOS processing
provides the TC850 with high-impedance, differential
inputs. Input bias current is typically only 30 pA, permit-
ting direct interface to sensors. Input sensitivity of 100
μV per Least Significant bit (LSb) eliminates the need
for precision external amplifiers. The internal amplifiers
are auto-zeroed, ensuring a zero digital output, with 0V
analog input. Zero adjustment potentiometers or
calibrations are not required.
The TC850 outputs data on an 8-bit, 3-state bus. Digital
inputs are CMOS compatible while outputs are TTL/
CMOS compatible. Chip-enable and byte-select inputs,
combined with an end-of-conversion output, ensures
easy interfacing to a wide variety of microprocessors.
Conversions can be performed continuously or on
command. In Continuous mode, data is read as three
consecutive bytes and manipulation of address lines is
not required.
Operating from ±5V supplies, the TC850 dissipates
only 20 m
Ω. The TC850 is packaged in a 40-pin plastic
or ceramic dual-in-line package (DIPs) and in a 44-pin
plastic leaded chip carrier (PLCC), surface-mount
package.
Functional Block Diagram
÷4
BUF
INT IN
Buffer
Pinout of 40-Pin Package
Integrator
Comparator
32
23
24
25
36
34
39
15
8
DB7
TC850
REF-
RINT
CINT
INT OUT
IN+
-
+
-
+
6-Bit
Up/Down
Counter
-
+
REF2+
REF1+
DB0
9-Bit
Up/Down
Counter
. . . .
53
WR
CONT/
DEMAND
Analog
Mux
31
30
IN-
COMMON
22
40
+5V
–5V
18
OSC2
17
7
L/H
6
OVR/
POL
4
RD
1
CS
2
CE
OSC1
A/D
Control
Sequencer
Data Latch
Octal 2-Input Mux
3-State Data Bus
Clock
Oscillator
Bus Interface
Decode Logic
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