參數(shù)資料
型號: TC826CBU
廠商: Microchip Technology Inc.
元件分類: 顯示驅(qū)動器
英文描述: Analog-to-Digital Converter with Bar Graph Display Output
中文描述: 模擬與條形圖顯示數(shù)字轉(zhuǎn)換器輸出
文件頁數(shù): 8/12頁
文件大?。?/td> 122K
代理商: TC826CBU
3-178
TELCOM SEMICONDUCTOR, INC.
The differential input voltage must be within the device
common-mode range when the converter and measured
system share the same power supply common (ground). If
the converter and measured system do not share the same
power supply common, –IN should be tied to analog-com-
mon. This is the usual connection for battery operated
systems. Polarity is determined at the end of signal integrate
signal phase. The sign bit is a true polarity indication in that
signals less than 1 LSB are correctly determined. This
allows precision null detection limited only by device noise
and system noise.
Reference Integrate Cycle
The final phase is reference integrate or deintegrate.
–IN is internally connected to analog common and +IN is
connected with the correct polarity to cause the integrator
output to return to zero. The time required for the output to
return to zero is proportional to the input signal and is
between 0 and 40 counts. The digital reading displayed is:
=
20
V
REF
V
I N
System Timing
The oscillator frequency is divided by 32 prior to clocking
the internal counters. The three phase measurement cycle
takes a total of 80 clock pulses. The 80 count cycle is
independent of input signal magnitude.
Each phase of the measurement cycle has the following
length:
Auto-Zero Phase: 19 to 59 Counts
For signals less than full-scale the auto-zero is as-
signed the unused reference integrate time period.
Signal Integrate: 20 Counts
This time period is fixed. The integration period is:
T
SI
= 20 32
Where F
OSC
is the externally set clock frequency.
Reference Integrate: 0 to 41 Counts
Reference Voltage Selection
A full-scale reading requires the input signal be twice the
reference voltage. The reference potential is measured
between REF IN (Pin 5) and ANALOG COMMON Pin 2).
Required Full-Scale Voltage
V
REF
10mV
1V
20mV
2V
INTERNAL
SYSTEM CLOCK
(FSYS)
AUTO–ZERO
PHASE (AZ)
SIGNAL
INTEGRATE
PHASE (SI)
REFERENCE INTEGRATE
PHASE (RI)
(DEINTEGRATE)
INTEGRATOR
OUTPUT
INTERNAL DATA
LATCH UPDATE
SIGNAL
19 COUNTS
MINIMUM
ONE CONVERSION CYCLE = 80 COUNTS (TCONV= 80 X
20
COUNTS
41 COUNTS
MAXIMUM
TI
TD
VIN
NUMBER OF
COUNTS
PROPORTIONAL
TO V N
1
FSYS)
TRUE ZERO
CROSSING
SIGN BIT
DETERMINED
ZERO CROSSING
DETECTED
ANALOG
COMMON
POTENTIAL
Figure 5. TC826 Conversion Has Three Phases
TC826
A/D CONVERTER WITH
BAR GRAPH DISPLAY OUTPUT
F
OSC
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