參數(shù)資料
型號(hào)： TC820C/KW
元件分類： ADC
英文描述： 1-CH 3-BIT DUAL-SLOPE ADC, PARALLEL ACCESS, PQFP44
封裝： 10 X 10 MM, 2 MM HEIGHT, PLASTIC, MQFP-44
文件頁數(shù)： 31/34頁
文件大?。?/td> 435K
代理商： TC820C/KW
TC820
DS21476C-page 6
2007 Microchip Technology Inc.
2.0
PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 2-1.
TABLE 2-1:
PIN FUNCTION TABLE
Pin Number
(40-PDIP)
Pin Number
(44-PQFP)
Symbol
Description
1
40
L-E4
LCD segment driver for L ("logic LOW"), polarity, and "e" segment of most significant digit
(MSD).
2
41
AGD4
LCD segment drive for "a," "g," and "d" segments of MSD.
3
42
BC4P3
LCD segment drive for "b" and "c" segments of MSD and decimal point 3.
4
43
HFE3
LCD segment drive for H ("logic HIGH"), and "f" and "e" segments of third LSD.
5
44
AGD3
LCD segment drive for "a," "g," and "d" segments of third LSD.
6
1
BC3P2
LCD segment drive for "b" and "c" segments of third LSD and decimal point 2.
7
2
OFE2
LCD segment drive for "over range," and "f" and "e" segments of second LSD.
8
3
AGD2
LCD segment drive for "a," "g," and "d" segments of second LSD.
9
4
BC2P1
LCD segment drive for "b " and "c" segments of second LSD and decimal point 1.
10
5
PKFE1
LCD segment drive for "hold peak reading," and "f" and "e" segments of LSD.
11
6
AGD1
LCD segment drive for "a," "g," and "d" segments of LSD.
12
7
BC1BT
LCD segment drive for "b" and "c" segments of LSD and "low battery."
13
8
BP3
LCD backplane #3.
14
9
BP2
LCD backplane #2.
15
10
BP1
LCD backplane #1.
—11
VDISP
Sets peak LCD drive signal: VPEAK = (VDD) – VDISP. VDISP may also be used to
compensate for temperature variation of LCD crystal threshold voltage.
16
12
DGND
Internal logic digital ground, the logic "0" level. Nominally 4.7V below VDD.
17
13
ANNUNC Square-wave output at the backplane frequency, synchronized to BP1. ANNUNC can be
used to control display annunciators. Connecting an LCD segment to ANNUNC turns it
on; connecting it to its backplane turns it off.
18
14
LOGIC
Logic mode control input. When connected to VDD, the converter is in Logic mode. The
LCD displays "OL" and the decimal point inputs control the HIGH and LOW annunciators.
When the "low" annunciator is on, the buzzer will also be on. When unconnected or
connected to DGND, the is in the Voltage/Frequency Measurement mode. This pin has a
5 A internal pull-down to DGND.
19
15
RANGE/
FREQ
Dual purpose input. In Range mode, when connected to VDD, the integration time
will be 200 counts instead of 2000 counts.
20
16
DP0/LO
Dual purpose input. Decimal point select input for voltage measurements. In logic mode,
connecting this pin to VDD will turn on the "low" LCD segment. There is an internal 5 A
pull-down to DGND in Volts mode only. Decimal point logic:
21
17
DP1/HI
Dual purpose input. Decimal point select input for voltage measurements. In Logic mode,
connecting this pin to VDD will turn on the "high" LCD segment. There is an internal 5 μA
pull-down to DGND in Volts mode only.
22
18
BUZOUT
Buzzer output. Audio frequency, 5kHz, output which drives a piezoelectric buzzer.
23
19
BUZIN
Buzzer control input. Connecting BUZIN to VDD turns the buzzer on. BUZIN is logically
OR’ed (internally) with the "logic level low" input. There is an internal 5
μA pull-down to
DGND.
DP1
DPQ
Decimal Point Selected
0
None
01
DP1
10
DP2
11
DP3
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PDF描述
TC820CKWTR 1-CH DUAL-SLOPE ADC, PQFP44
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